| /u-boot/arch/xtensa/include/asm/arch-dc232b/ |
| A D | tie-asm.h | 38 rsr \at1, ACCLO // MAC16 accumulator
39 rsr \at2, ACCHI
46 rsr \at1, M0 // MAC16 registers
47 rsr \at2, M1
50 rsr \at1, M2
51 rsr \at2, M3
58 rsr \at1, SCOMPARE1 // conditional store option
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| /u-boot/arch/xtensa/include/asm/arch-de212/ |
| A D | tie-asm.h | 60 rsr.ACCLO \at1 // MAC16 option
62 rsr.ACCHI \at1 // MAC16 option
72 rsr.SCOMPARE1 \at1 // conditional store option
74 rsr.M0 \at1 // MAC16 option
76 rsr.M1 \at1 // MAC16 option
78 rsr.M2 \at1 // MAC16 option
80 rsr.M3 \at1 // MAC16 option
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| /u-boot/arch/xtensa/include/asm/arch-dc233c/ |
| A D | tie-asm.h | 69 rsr \at1, ACCLO // MAC16 option
71 rsr \at1, ACCHI // MAC16 option
81 rsr \at1, M0 // MAC16 option
83 rsr \at1, M1 // MAC16 option
85 rsr \at1, M2 // MAC16 option
87 rsr \at1, M3 // MAC16 option
89 rsr \at1, SCOMPARE1 // conditional store option
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| /u-boot/arch/xtensa/cpu/ |
| A D | start.S | 302 rsr a0, windowbase
375 rsr a2, EXCCAUSE # find handler
395 rsr a3, EXCSAVE1
417 rsr a2, WINDOWSTART
421 rsr a2, SAR
422 rsr a3, EPC1
423 rsr a4, EXCVADDR
430 rsr a3, LBEG
433 rsr a3, LEND
441 rsr a2, EXCCAUSE
[all …]
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| /u-boot/arch/powerpc/cpu/mpc83xx/ |
| A D | cpu_init.c | 154 gd->arch.reset_status = __raw_readl(&im->reset.rsr); in cpu_init_f()
155 __raw_writel(~(RSR_RES), &im->reset.rsr); in cpu_init_f()
390 ulong rsr = gd->arch.reset_status; in prt_83xx_rsr() local
398 if (rsr & bits[i].mask) { in prt_83xx_rsr()
405 print_83xx_arb_event(rsr & RSR_BMRS); in prt_83xx_rsr()
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| /u-boot/drivers/sysreset/ |
| A D | sysreset_mpc83xx.c | 153 ulong rsr = gd->arch.reset_status; in mpc83xx_sysreset_get_status() local
170 if (rsr & bits[i].mask) { in mpc83xx_sysreset_get_status()
193 res = print_83xx_arb_event(rsr & RSR_BMRS, buf, size); in mpc83xx_sysreset_get_status()
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| /u-boot/arch/arm/mach-imx/imx8ulp/upower/ |
| A D | upower_hal.c | 37 while (!(readl(&muptr->rsr) & BIT(0))) { in upower_wait_resp()
38 debug("%s: poll the mu:%x\n", __func__, readl(&muptr->rsr)); in upower_wait_resp()
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| A D | upower_api.c | 200 u32 len = readl(&mu->rsr); in upwr_rx()
279 if (readl(&mu->rsr)) in upwr_txrx_isr()
388 if (readl(&mu->rsr) & BIT(0)) /* first clean any Rx message left over */ in upwr_init()
407 while (!readl(&mu->rsr) & BIT(0)) in upwr_init()
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| /u-boot/arch/arm/mach-at91/include/mach/ |
| A D | at91_emac.h | 20 u32 rsr; member
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| /u-boot/arch/m68k/include/asm/ |
| A D | immap_5307.h | 21 u8 rsr; member
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| A D | immap_520x.h | 83 u8 rsr; member
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| A D | immap_5235.h | 197 u8 rsr; /* 0x02 */ member
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| A D | immap_5301x.h | 141 u8 rsr; member
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| A D | immap_5275.h | 347 u8 rsr; member
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| A D | immap_5329.h | 141 u8 rsr; member
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| A D | immap_5441x.h | 99 u8 rsr; member
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| /u-boot/arch/arm/include/asm/arch-imx8ulp/ |
| A D | imx-regs.h | 87 u32 rsr; member
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| /u-boot/drivers/misc/sentinel/ |
| A D | s4mu.c | 73 ret = readl_poll_timeout(&mu_base->rsr, val, val & mask, 10000); in mu_hal_receivemsg()
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| /u-boot/arch/arm/include/asm/arch-imx9/ |
| A D | imx-regs.h | 74 u32 rsr; member
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| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| A D | dram_sun50i_h6.h | 267 u32 rsr[4]; /* 0xd0 */ member
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| /u-boot/drivers/clk/stm32/ |
| A D | clk-stm32h7.c | 172 u32 rsr; /* 0xd0 Reset Status Register */ member
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | dram_sun50i_h6.c | 537 debug("DRAM PHY DX%dRSR0 = %x\n", i, readl(&mctl_phy->dx[i].rsr[0])); in mctl_channel_init()
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| /u-boot/arch/powerpc/include/asm/ |
| A D | immap_83xx.h | 186 u32 rsr; /* Reset Status Register */ member
|