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/u-boot/drivers/reset/
A Dreset-ti-sci.c46 static int ti_sci_reset_of_xlate(struct reset_ctl *rst, in ti_sci_reset_of_xlate() argument
60 rst->id = args->args[0]; in ti_sci_reset_of_xlate()
61 rst->data = args->args[1]; in ti_sci_reset_of_xlate()
97 reset_state |= rst->data; in ti_sci_reset_set()
99 reset_state &= ~rst->data; in ti_sci_reset_set()
124 debug("%s(rst=%p)\n", __func__, rst); in ti_sci_reset_assert()
125 return ti_sci_reset_set(rst, true); in ti_sci_reset_assert()
141 debug("%s(rst=%p)\n", __func__, rst); in ti_sci_reset_deassert()
142 return ti_sci_reset_set(rst, false); in ti_sci_reset_deassert()
165 debug("%s(rst=%p)\n", __func__, rst); in ti_sci_reset_status()
[all …]
A Dreset-zynqmp.c29 static int zynqmp_reset_assert(struct reset_ctl *rst) in zynqmp_reset_assert() argument
31 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev); in zynqmp_reset_assert()
33 dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id); in zynqmp_reset_assert()
35 return zynqmp_pm_reset_assert(priv->reset_id + rst->id, in zynqmp_reset_assert()
39 static int zynqmp_reset_deassert(struct reset_ctl *rst) in zynqmp_reset_deassert() argument
41 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev); in zynqmp_reset_deassert()
43 dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id); in zynqmp_reset_deassert()
45 return zynqmp_pm_reset_assert(priv->reset_id + rst->id, in zynqmp_reset_deassert()
49 static int zynqmp_reset_request(struct reset_ctl *rst) in zynqmp_reset_request() argument
54 rst, rst->id, priv->nr_reset); in zynqmp_reset_request()
[all …]
A Dreset-hisilicon.c24 val = readl(priv->base + rst->data); in hisi_reset_deassert()
25 if (rst->polarity & DEASSERT_SET) in hisi_reset_deassert()
26 val |= BIT(rst->id); in hisi_reset_deassert()
28 val &= ~BIT(rst->id); in hisi_reset_deassert()
29 writel(val, priv->base + rst->data); in hisi_reset_deassert()
40 if (rst->polarity & ASSERT_SET) in hisi_reset_assert()
41 val |= BIT(rst->id); in hisi_reset_assert()
43 val &= ~BIT(rst->id); in hisi_reset_assert()
58 rst->data = args->args[0]; in hisi_reset_of_xlate()
59 rst->id = args->args[1]; in hisi_reset_of_xlate()
[all …]
A Dreset-imx7.c85 switch (rst->id) { in imx7_reset_deassert_imx7()
87 val |= sig[rst->id].bit; in imx7_reset_deassert_imx7()
90 val &= ~sig[rst->id].bit; in imx7_reset_deassert_imx7()
108 switch (rst->id) { in imx7_reset_assert_imx7()
110 val &= ~sig[rst->id].bit; in imx7_reset_assert_imx7()
113 val |= sig[rst->id].bit; in imx7_reset_assert_imx7()
207 switch (rst->id) { in imx7_reset_deassert_imx8mq()
215 val |= sig[rst->id].bit; in imx7_reset_deassert_imx8mq()
218 val &= ~sig[rst->id].bit; in imx7_reset_deassert_imx8mq()
236 switch (rst->id) { in imx7_reset_assert_imx8mq()
[all …]
A Dreset-hsdk.c49 static int hsdk_reset_do(struct hsdk_rst *rst) in hsdk_reset_do() argument
53 reg = readl(rst->regs_rst + CGU_IP_SW_RESET); in hsdk_reset_do()
57 writel(reg, rst->regs_rst + CGU_IP_SW_RESET); in hsdk_reset_do()
67 struct hsdk_rst *rst = dev_get_priv(dev); in hsdk_reset_reset() local
75 hsdk_reset_config(rst, rst_ctl->id); in hsdk_reset_reset()
76 return hsdk_reset_do(rst); in hsdk_reset_reset()
90 struct hsdk_rst *rst = dev_get_priv(dev); in hsdk_reset_probe() local
92 rst->regs_ctl = dev_remap_addr_index(dev, 0); in hsdk_reset_probe()
93 if (!rst->regs_ctl) in hsdk_reset_probe()
96 rst->regs_rst = dev_remap_addr_index(dev, 1); in hsdk_reset_probe()
[all …]
A Dreset-sifive.c24 static int sifive_rst_trigger(struct reset_ctl *rst, bool level) in sifive_rst_trigger() argument
26 struct sifive_reset_priv *priv = dev_get_priv(rst->dev); in sifive_rst_trigger()
27 int id = rst->id; in sifive_rst_trigger()
43 static int sifive_reset_assert(struct reset_ctl *rst) in sifive_reset_assert() argument
45 return sifive_rst_trigger(rst, false); in sifive_reset_assert()
48 static int sifive_reset_deassert(struct reset_ctl *rst) in sifive_reset_deassert() argument
50 return sifive_rst_trigger(rst, true); in sifive_reset_deassert()
53 static int sifive_reset_request(struct reset_ctl *rst) in sifive_reset_request() argument
55 struct sifive_reset_priv *priv = dev_get_priv(rst->dev); in sifive_reset_request()
58 rst, rst->dev, rst->id, priv->nr_reset); in sifive_reset_request()
[all …]
A Dreset-scmi.c26 struct scmi_reset_priv *priv = dev_get_priv(rst->dev); in scmi_reset_set_level()
28 .domain_id = rst->id, in scmi_reset_set_level()
38 ret = devm_scmi_process_msg(rst->dev, priv->channel, &msg); in scmi_reset_set_level()
45 static int scmi_reset_assert(struct reset_ctl *rst) in scmi_reset_assert() argument
47 return scmi_reset_set_level(rst, true); in scmi_reset_assert()
50 static int scmi_reset_deassert(struct reset_ctl *rst) in scmi_reset_deassert() argument
52 return scmi_reset_set_level(rst, false); in scmi_reset_deassert()
55 static int scmi_reset_request(struct reset_ctl *rst) in scmi_reset_request() argument
57 struct scmi_reset_priv *priv = dev_get_priv(rst->dev); in scmi_reset_request()
59 .domain_id = rst->id, in scmi_reset_request()
[all …]
A Dreset-syscon.c22 static int syscon_reset_request(struct reset_ctl *rst) in syscon_reset_request() argument
24 struct syscon_reset_priv *priv = dev_get_priv(rst->dev); in syscon_reset_request()
26 if (BIT(rst->id) & priv->mask) in syscon_reset_request()
32 static int syscon_reset_assert(struct reset_ctl *rst) in syscon_reset_assert() argument
34 struct syscon_reset_priv *priv = dev_get_priv(rst->dev); in syscon_reset_assert()
36 return regmap_update_bits(priv->regmap, priv->offset, BIT(rst->id), in syscon_reset_assert()
37 priv->assert_high ? BIT(rst->id) : 0); in syscon_reset_assert()
40 static int syscon_reset_deassert(struct reset_ctl *rst) in syscon_reset_deassert() argument
42 struct syscon_reset_priv *priv = dev_get_priv(rst->dev); in syscon_reset_deassert()
44 return regmap_update_bits(priv->regmap, priv->offset, BIT(rst->id), in syscon_reset_deassert()
[all …]
A Dreset-bcm6345.c25 static int bcm6345_reset_assert(struct reset_ctl *rst) in bcm6345_reset_assert() argument
27 struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev); in bcm6345_reset_assert()
29 clrbits_be32(priv->regs, BIT(rst->id)); in bcm6345_reset_assert()
35 static int bcm6345_reset_deassert(struct reset_ctl *rst) in bcm6345_reset_deassert() argument
37 struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev); in bcm6345_reset_deassert()
39 setbits_be32(priv->regs, BIT(rst->id)); in bcm6345_reset_deassert()
45 static int bcm6345_reset_request(struct reset_ctl *rst) in bcm6345_reset_request() argument
47 if (rst->id >= MAX_RESETS) in bcm6345_reset_request()
50 return bcm6345_reset_assert(rst); in bcm6345_reset_request()
A Dreset-jh7110.c90 static int jh7110_reset_assert(struct reset_ctl *rst) in jh7110_reset_assert() argument
92 struct jh7110_reset_priv *priv = dev_get_priv(rst->dev); in jh7110_reset_assert()
94 jh7110_reset_trigger(priv, rst->id, true); in jh7110_reset_assert()
99 static int jh7110_reset_deassert(struct reset_ctl *rst) in jh7110_reset_deassert() argument
101 struct jh7110_reset_priv *priv = dev_get_priv(rst->dev); in jh7110_reset_deassert()
103 jh7110_reset_trigger(priv, rst->id, false); in jh7110_reset_deassert()
108 static int jh7110_reset_free(struct reset_ctl *rst) in jh7110_reset_free() argument
113 static int jh7110_reset_request(struct reset_ctl *rst) in jh7110_reset_request() argument
115 struct jh7110_reset_priv *priv = dev_get_priv(rst->dev); in jh7110_reset_request()
117 if (rst->id >= priv->resets) in jh7110_reset_request()
A Dreset-qcom.c134 static int qcom_reset_assert(struct reset_ctl *rst) in qcom_reset_assert() argument
136 struct qcom_reset_priv *priv = dev_get_priv(rst->dev); in qcom_reset_assert()
141 map = &reset_map[rst->id]; in qcom_reset_assert()
150 static int qcom_reset_deassert(struct reset_ctl *rst) in qcom_reset_deassert() argument
152 struct qcom_reset_priv *priv = dev_get_priv(rst->dev); in qcom_reset_deassert()
157 map = &reset_map[rst->id]; in qcom_reset_deassert()
/u-boot/arch/x86/include/asm/
A Dintel_pinctrl_defs.h165 #define PAD_CFG_NF(pad, pull, rst, func) \ argument
174 #define PAD_CFG_NF_1V8(pad, pull, rst, func) \ argument
201 #define PAD_CFG_GPO(pad, val, rst) \ argument
207 #define PAD_CFG_TERM_GPO(pad, val, pull, rst) \ argument
226 #define PAD_CFG_GPI(pad, pull, rst) \ argument
289 #define PAD_CFG_GPI_APIC_LOW(pad, pull, rst) \ argument
293 PAD_CFG_GPI_APIC(pad, pull, rst, LEVEL, NONE)
313 PAD_CFG_GPI_SMI(pad, pull, rst, trig, INVERT)
316 PAD_CFG_GPI_SMI(pad, pull, rst, trig, NONE)
333 PAD_CFG_GPI_SCI(pad, pull, rst, trig, INVERT)
[all …]
/u-boot/arch/arm/mach-mvebu/
A Dsystem-controller.c17 static int mvebu_reset_of_xlate(struct reset_ctl *rst, in mvebu_reset_of_xlate() argument
23 rst->id = args->args[0]; in mvebu_reset_of_xlate()
24 rst->data = args->args[1]; in mvebu_reset_of_xlate()
27 if (rst->id != MVEBU_PCIE_ID) in mvebu_reset_of_xlate()
31 if (!(rst->data >= 0 && rst->data <= 3)) in mvebu_reset_of_xlate()
37 static int mvebu_reset_request(struct reset_ctl *rst) in mvebu_reset_request() argument
42 static int mvebu_reset_free(struct reset_ctl *rst) in mvebu_reset_free() argument
47 static int mvebu_reset_assert(struct reset_ctl *rst) in mvebu_reset_assert() argument
49 struct mvebu_reset_data *data = dev_get_priv(rst->dev); in mvebu_reset_assert()
55 static int mvebu_reset_deassert(struct reset_ctl *rst) in mvebu_reset_deassert() argument
[all …]
/u-boot/arch/arm/dts/
A Dsocfpga_stratix10.dtsi96 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
108 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
120 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
174 resets = <&rst I2C0_RESET>;
185 resets = <&rst I2C1_RESET>;
196 resets = <&rst I2C2_RESET>;
207 resets = <&rst I2C3_RESET>;
230 resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>;
253 rst: rstmgr@ffd11000 { label
370 resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
[all …]
A Dsocfpga_agilex.dtsi144 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
162 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
180 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
238 resets = <&rst I2C0_RESET>;
249 resets = <&rst I2C1_RESET>;
260 resets = <&rst I2C2_RESET>;
311 resets = <&rst NAND_RESET>, <&rst NAND_OCP_RESET>;
335 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
341 rst: rstmgr@ffd11000 { label
477 resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
[all …]
A Dsocfpga_agilex-u-boot.dtsi57 resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>;
72 &rst {
73 compatible = "altr,rst-mgr";
83 resets = <&rst DDRSCH_RESET>;
A Dhi3798cv200-u-boot.dtsi14 rst: reset-controller@8a22000 { label
28 resets = <&rst 0xcc 9 ASSERT_SET>,
29 <&rst 0xcc 11 ASSERT_SET>,
30 <&rst 0xcc 13 DEASSERT_SET>;
/u-boot/test/dm/
A Dsyscon-reset.c29 struct reset_ctl rst; in dm_test_syscon_reset() local
43 ut_asserteq(-EINVAL, reset_get_by_name(reset, "no_mask", &rst)); in dm_test_syscon_reset()
44 ut_asserteq(-EINVAL, reset_get_by_name(reset, "out_of_range", &rst)); in dm_test_syscon_reset()
45 ut_assertok(reset_get_by_name(reset, "valid", &rst)); in dm_test_syscon_reset()
49 ut_assertok(reset_assert(&rst)); in dm_test_syscon_reset()
53 ut_assertok(reset_deassert(&rst)); in dm_test_syscon_reset()
/u-boot/doc/sphinx-static/
A Dtheme_overrides.css14 .rst-content .highlight > pre {
37 .rst-content table.docutils caption { text-align: left; font-size: 100%; }
50 caption, .wy-table caption, .rst-content table.field-list caption {
72 .rst-content .section ul li:last-child, .rst-content .section ul li p:last-child {
78 code, .rst-content tt, .rst-content code {
86 .rst-content tt.literal,.rst-content tt.literal,.rst-content code.literal {
/u-boot/board/amlogic/p200/
A DMAINTAINERS12 F: doc/board/amlogic/p200.rst
13 F: doc/board/amlogic/nanopi-k2.rst
14 F: doc/board/amlogic/odroid-c2.rst
15 F: doc/board/amlogic/wetek-hub.rst
16 F: doc/board/amlogic/wetek-play2.rst
/u-boot/doc/develop/uefi/
A Dindex.rst13 uefi.rst
14 u-boot_on_efi.rst
15 iscsi.rst
16 fwu_updates.rst
/u-boot/board/amlogic/u200/
A DMAINTAINERS10 F: doc/board/amlogic/u200.rst
11 F: doc/board/amlogic/bananapi-m2pro.rst
12 F: doc/board/amlogic/bananapi-m5.rst
13 F: doc/board/amlogic/radxa-zero.rst
/u-boot/board/amlogic/w400/
A DMAINTAINERS9 F: doc/board/amlogic/w400.rst
10 F: doc/board/amlogic/bananapi-cm4io.rst
11 F: doc/board/amlogic/bananapi-m2s.rst
12 F: doc/board/amlogic/radxa-zero2.rst
/u-boot/board/amlogic/p212/
A DMAINTAINERS12 F: doc/board/amlogic/p212.rst
13 F: doc/board/amlogic/libretech-ac.rst
14 F: doc/board/amlogic/libretech-cc.rst
15 F: doc/board/amlogic/khadas-vim.rst
/u-boot/board/amlogic/beelink-s922x/
A DMAINTAINERS9 F: doc/board/amlogic/beelink-gskingx.rst
10 F: doc/board/amlogic/beelink-gtking.rst
11 F: doc/board/amlogic/beelink-gtkingpro.rst

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