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Searched refs:sp (Results 1 – 25 of 109) sorted by relevance

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/u-boot/arch/nios2/cpu/
A Dexceptions.S23 addi sp, sp, -(33*4)
24 stw r0, 0(sp)
25 stw r1, 4(sp)
26 stw r2, 8(sp)
27 stw r3, 12(sp)
28 stw r4, 16(sp)
29 stw r5, 20(sp)
30 stw r6, 24(sp)
31 stw r7, 28(sp)
32 stw r8, 32(sp)
[all …]
A Dstart.S82 mov sp, r5 /* initial stack below u-boot code */
102 addi sp, sp, -8
103 stw r0, 0(sp)
104 stw r0, 4(sp)
105 mov fp, sp
115 mov r4, sp
119 mov sp, r2
120 mov r4, sp
126 mov fp, sp
157 mov sp, r4 /* Set the new sp */
/u-boot/arch/riscv/cpu/
A Dmtrap.S33 addi sp, sp, -32 * REGBYTES
34 SREG x1, 1 * REGBYTES(sp)
35 SREG x2, 2 * REGBYTES(sp)
36 SREG x3, 3 * REGBYTES(sp)
37 SREG x4, 4 * REGBYTES(sp)
38 SREG x5, 5 * REGBYTES(sp)
39 SREG x6, 6 * REGBYTES(sp)
40 SREG x7, 7 * REGBYTES(sp)
41 SREG x8, 8 * REGBYTES(sp)
68 mv a3, sp
[all …]
/u-boot/arch/mips/lib/
A Dgenex.S24 LONG_S $1, PT_R1(sp)
33 LONG_S $8, PT_R8(sp)
34 LONG_S $9, PT_R9(sp)
40 LONG_S v1, PT_HI(sp)
48 LONG_S v1, PT_LO(sp)
69 move sp, k1
71 LONG_S $3, PT_R3(sp)
72 LONG_S $0, PT_R0(sp)
167 LONG_L sp, PT_R29(sp)
190 move a0, sp
[all …]
/u-boot/arch/arm/cpu/armv8/
A Dexceptions.S59 stp x7, x8, [sp, #-16]!
60 stp x5, x6, [sp, #-16]!
61 stp x3, x4, [sp, #-16]!
92 mov x0, sp
105 ldp xzr, x2, [sp],#16
125 ldp xzr, x0, [sp],#16
126 ldp x1, x2, [sp],#16
127 ldp x3, x4, [sp],#16
128 ldp x5, x6, [sp],#16
129 ldp x7, x8, [sp],#16
[all …]
A Dpsci.S104 stp x15, xzr, [sp, #-16]!
120 ldp x18, x15, [sp], #16
122 ldp x19, x20, [sp], #16
123 ldp x21, x22, [sp], #16
124 ldp x23, x24, [sp], #16
125 ldp x25, x26, [sp], #16
126 ldp x27, x28, [sp], #16
127 ldp x29, x30, [sp], #16
129 ldp x15, xzr, [sp], #16
245 mov sp, x0
[all …]
/u-boot/arch/arc/lib/
A D_millicodethunk.S52 st r25, [sp,48]
54 st r24, [sp,44]
56 st r23, [sp,40]
58 st r22, [sp,36]
60 st r21, [sp,32]
62 st r20, [sp,28]
64 st r19, [sp,24]
66 st r18, [sp,20]
68 st r17, [sp,16]
70 st r16, [sp,12]
[all …]
A Dints_low.S60 st %r0, [%sp]
61 st %sp, [%sp, -4]
63 sub %sp, %sp, 8
86 mov %r1, %sp
93 mov %r1, %sp
106 mov %r1, %sp
112 mov %r0, %sp
118 mov %r0, %sp
125 mov %r1, %sp
131 mov %r0, %sp
[all …]
/u-boot/arch/arm/cpu/armv7/
A Dlowlevel_init.S30 ldr sp, =CONFIG_SPL_STACK
32 ldr sp, =SYS_INIT_SP_ADDR
34 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
45 sub sp, sp, #GD_SIZE
46 bic sp, sp, #7
47 mov r9, sp
/u-boot/arch/arm/mach-mvebu/
A Dlowlevel_spl.S16 stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
18 str sp, [r12]
24 ldr sp, [r12]
25 ldmfd sp!, {r0 - r12, lr} /* @ restore registers from stack */
38 stmfd sp!, {r1-r12}
42 ldmfd sp!, {r1-r12}
54 stmfd sp!, {r1-r12}
60 ldmfd sp!, {r1-r12}
72 stmfd sp!, {r1-r12}
78 ldmfd sp!, {r1-r12}
/u-boot/arch/mips/mach-mtmips/mt7620/
A Dlowlevel_init.S24 PTR_LI sp, 0xb0187f00
28 sp, sp, GD_SIZE # reserve space for gd
30 and sp, sp, t0 # force 16 byte alignment
31 move k0, sp # save gd pointer
33 move fp, sp
/u-boot/drivers/phy/cadence/
A Dphy-cadence-sierra.c544 struct cdns_sierra_phy *sp = priv->sp; in cdns_sierra_pll_mux_set_parent() local
995 sp->phy_rst = rst; in cdns_sierra_phy_get_resets()
1047 node = sp->nsubnodes; in cdns_sierra_link_probe()
1048 sp->phys[node] = inst; in cdns_sierra_link_probe()
1049 sp->nsubnodes += 1; in cdns_sierra_link_probe()
1053 if (!sp->autoconf && !sp->already_configured && sp->nsubnodes > 1) { in cdns_sierra_link_probe()
1077 sp->dev = dev; in cdns_sierra_phy_probe()
1080 if (!sp->base) { in cdns_sierra_phy_probe()
1088 sp->init_data = data; in cdns_sierra_phy_probe()
1090 ret = cdns_regmap_init_blocks(sp, sp->base, data->block_offset_shift, in cdns_sierra_phy_probe()
[all …]
/u-boot/arch/arm/lib/
A Dvectors.S197 sub sp, sp, #S_FRAME_SIZE
203 add r5, sp, #S_SP
210 sub sp, sp, #S_FRAME_SIZE
211 stmia sp, {r0 - r12} @ Calling r0-r12
213 add r8, sp, #S_PC
214 stmdb r8, {sp, lr}^ @ Calling SP, LR
219 mov r0, sp
225 ldr lr, [sp, #S_PC] @ Get PC
226 add sp, sp, #S_FRAME_SIZE
244 ldr sp, IRQ_STACK_START
[all …]
A Dcrt0_arm_efi.S120 stmfd sp!, {r0-r2, lr}
130 ldmfd sp, {r0-r1}
133 0: add sp, sp, #12
134 ldr pc, [sp], #4
A Drelocate_64.S23 stp x29, x30, [sp, #-32]! /* create a stack frame */
24 mov x29, sp
25 str x0, [sp, #16]
55 str x0, [sp, #24]
91 4: ldp x0, x1, [sp, #16]
94 5: ldp x29, x30, [sp],#32
A Dvectors_m.S14 mov r0, sp @ pass auto-saved registers as argument
19 mov r0, sp @ pass auto-saved registers as argument
24 mov r0, sp @ pass auto-saved registers as argument
29 mov r0, sp @ pass auto-saved registers as argument
34 mov r0, sp @ pass auto-saved registers as argument
/u-boot/arch/m68k/cpu/mcf530x/
A Dstart.S18 moveml %d0-%d7/%a0-%a6,%sp@
22 moveml %sp@,%d0-%d7/%a0-%a6;
134 move.l %sp, -(%sp)
139 move.l %d0, %sp
140 move.l %sp, %fp
143 move.l %d0, -(%sp)
152 clr.l %sp@-
245 movel %sp,%sp@-
248 addql #4,%sp
254 movel %sp,%sp@-
[all …]
/u-boot/arch/m68k/cpu/mcf532x/
A Dstart.S20 moveml %d0-%d7/%a0-%a6,%sp@;
140 move.l %sp, -(%sp)
145 move.l %d0, %sp
146 move.l %sp, %fp
149 move.l %d0, -(%sp)
158 clr.l %sp@-
242 move.l %d0,-(%sp) /* gd */
255 movel %sp,%sp@-
257 addql #4,%sp
263 movel %sp,%sp@-
[all …]
/u-boot/arch/m68k/cpu/mcf523x/
A Dstart.S17 moveml %d0-%d7/%a0-%a6,%sp@;
20 moveml %sp@,%d0-%d7/%a0-%a6; \
125 move.l %sp, -(%sp)
130 move.l %d0, %sp
131 move.l %sp, %fp
134 move.l %d0, -(%sp)
143 clr.l %sp@-
240 movel %sp,%sp@-
242 addql #4,%sp
248 movel %sp,%sp@-
[all …]
/u-boot/arch/riscv/lib/
A Dcrt0_riscv_efi.S15 #define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp)
16 #define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp)
27 #define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp)
28 #define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp)
160 addi sp, sp, -(SIZE_LONG * 3)
176 0: addi sp, sp, (SIZE_LONG * 3)
/u-boot/arch/mips/mach-mtmips/mt7621/spl/
A Dstart.S35 and sp, t1, t0 # force 16 byte alignment
37 sp, sp, GD_SIZE # reserve space for gd
38 and sp, sp, t0 # force 16 byte alignment
39 move k0, sp # save gd pointer
44 sp, sp, t2 # reserve space for early malloc
45 and sp, sp, t0 # force 16 byte alignment
47 move fp, sp
59 PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
137 li sp, SP_ADDR_TEMP
/u-boot/scripts/
A Dcheckstack.pl49 $re = qr/^.*stp.*sp,\#-([0-9]{1,8})\]\!/o;
52 $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
65 $re = qr/.*(?:linkw %fp,|addaw )#-([0-9]{1,4})(?:,%sp)?$/o;
72 $re = qr/.*daddiu.*sp,sp,-(([0-9]{2}|[3-9])[0-9]{2})/o;
75 $re = qr/.*addiu.*sp,sp,-(([0-9]{2}|[3-9])[0-9]{2})/o;
103 $re = qr/.*save.*%sp, -(([0-9]{2}|[3-9])[0-9]{2}), %sp/o;
/u-boot/arch/mips/cpu/
A Dstart.S44 and sp, t1, t0 # force 16 byte alignment
46 sp, sp, GD_SIZE # reserve space for gd
47 and sp, sp, t0 # force 16 byte alignment
48 move k0, sp # save gd pointer
53 sp, sp, t2 # reserve space for early malloc
54 and sp, sp, t0 # force 16 byte alignment
56 move fp, sp
68 PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
/u-boot/arch/m68k/cpu/mcf52x2/
A Dstart.S18 moveml %d0-%d7/%a0-%a6,%sp@; \
21 moveml %sp@,%d0-%d7/%a0-%a6; \
204 move.l %sp, -(%sp)
209 move.l %d0, %sp
210 move.l %sp, %fp
213 move.l %d0, -(%sp)
222 clr.l %sp@-
318 movel %sp,%sp@-
320 addql #4,%sp
326 movel %sp,%sp@-
[all …]
/u-boot/arch/powerpc/cpu/mpc8xx/
A Dtraps.c34 static void print_backtrace(unsigned long *sp) in print_backtrace() argument
40 while (sp) { in print_backtrace()
41 if ((uint)sp > END_OF_MEM) in print_backtrace()
44 i = sp[1]; in print_backtrace()
50 sp = (unsigned long *)*sp; in print_backtrace()

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