| /u-boot/drivers/mtd/nand/raw/ |
| A D | rockchip_nfc.c | 456 for (i = 0; i < ecc->steps; i++) { in rk_nfc_write_page_raw()
563 for (i = 0; i < ecc->steps; i++) { in rk_nfc_write_page_hwecc()
584 ecc->steps * oob_step, in rk_nfc_write_page_hwecc()
593 dma_unmap_single(dma_oob, ecc->steps * oob_step, in rk_nfc_write_page_hwecc()
637 for (i = 0; i < ecc->steps; i++) { in rk_nfc_read_page_raw()
693 ecc->steps * oob_step, in rk_nfc_read_page_hwecc()
714 dma_unmap_single(dma_oob, ecc->steps * oob_step, in rk_nfc_read_page_hwecc()
723 for (i = 1; i < ecc->steps; i++) { in rk_nfc_read_page_hwecc()
735 for (i = 0; i < (ecc->steps / 2); i++) { in rk_nfc_read_page_hwecc()
831 ecc->steps = mtd->writesize / ecc->size; in rk_nfc_ecc_init()
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| A D | mxc_nand.c | 400 for (i = 0; i < chip->ecc.steps; i++) {
426 for (i = 0; i < chip->ecc.steps; i++) {
448 int steps, size; local
454 for (n = 0, steps = chip->ecc.steps; steps > 0; n++, steps--) {
492 int eccsteps = chip->ecc.steps;
536 eccsteps = chip->ecc.steps;
555 int i, len, status, steps = chip->ecc.steps; local
559 for (i = 0; i < steps; i++) {
585 int steps, size; local
588 for (n = 0, steps = chip->ecc.steps; steps > 0; n++, steps--) {
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| A D | mt7621_nand.c | 234 return nand->oob_poi + nand->ecc.steps * NFI_FDM_SIZE + in oob_ecc_ptr()
338 FIELD_GET(SEC_CNTR, val) >= nand->ecc.steps, in mt7621_nfc_wait_write_completion()
685 nand->ecc.steps = mtd->writesize / nand->ecc.size; in mt7621_nfc_ecc_init()
687 avail_ecc_bytes = mtd->oobsize / nand->ecc.steps - NFI_FDM_SIZE; in mt7621_nfc_ecc_init()
769 for (i = 0; i < nand->ecc.steps; i++) { in mt7621_nfc_write_fdm()
821 for (i = 0; i < nand->ecc.steps; i++) { in mt7621_nfc_read_page_hwecc()
878 for (i = 0; i < nand->ecc.steps; i++) { in mt7621_nfc_read_page_raw()
923 for (i = 0; i < nand->ecc.steps; i++) { in mt7621_nfc_check_empty_page()
994 for (i = 0; i < nand->ecc.steps; i++) { in mt7621_nfc_write_page_raw()
1035 if (section >= nand->ecc.steps) in mt7621_nfc_ooblayout_free()
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| A D | nand_base.c | 1822 int steps, size, ret; in nand_read_page_raw_syndrome() local
1824 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
1879 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
1894 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2063 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
2600 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome() local
2610 steps = 0; in nand_write_oob_syndrome()
2618 for (i = 0; i < steps; i++) { in nand_write_oob_syndrome()
2852 int steps, size, ret; in nand_write_page_raw_syndrome() local
2854 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
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| A D | zynq_nand.c | 592 for (eccsteps = chip->ecc.steps; (eccsteps - 1); eccsteps--) { in zynq_nand_write_page_hwecc()
644 int eccsteps = chip->ecc.steps; in zynq_nand_write_page_swecc()
685 for (eccsteps = chip->ecc.steps; (eccsteps - 1); eccsteps--) { in zynq_nand_read_page_hwecc()
722 eccsteps = chip->ecc.steps; in zynq_nand_read_page_hwecc()
749 int eccsteps = chip->ecc.steps; in zynq_nand_read_page_swecc()
763 eccsteps = chip->ecc.steps; in zynq_nand_read_page_swecc()
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| /u-boot/lib/efi_selftest/ |
| A D | efi_selftest.c | 213 unsigned int steps, unsigned int *failures) in efi_st_do_tests() argument
226 if (steps & EFI_ST_SETUP) in efi_st_do_tests()
228 if (steps & EFI_ST_EXECUTE && setup_status[i] == EFI_ST_SUCCESS) in efi_st_do_tests()
230 if (steps & EFI_ST_TEARDOWN) in efi_st_do_tests()
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| /u-boot/ |
| A D | .azure-pipelines.yml | 19 steps:
46 steps:
63 steps:
77 steps:
87 steps:
102 steps:
114 steps:
124 steps:
135 steps:
146 steps:
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| /u-boot/doc/ |
| A D | README.mxc_ocotp | 37 the steps in 46.2.1.2.
40 Program operations are implemented as explained by the steps in 46.2.1.3.
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| A D | README.pblimage | 11 Building PBL Boot Image and boot steps
32 Following steps describe it in detail.
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| A D | README.kconfig | 61 Migration steps to Kconfig
108 When adding a new board, the following steps are generally needed:
128 When removing an obsolete board, the following steps are generally needed:
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| A D | README.ublimage | 79 compile steps:
96 This steps are done automagically if you do a "make all"
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| /u-boot/tools/ |
| A D | sunxi-spl-image-builder.c | 117 int steps = info->usable_page_size / info->ecc_step_size; in write_page() local
159 offs = steps * (info->ecc_step_size + eccbytes + 4); in write_page()
168 offs = info->page_size + (steps * (eccbytes + 4)); in write_page()
177 for (i = 0; i < steps; i++) { in write_page()
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| /u-boot/doc/board/renesas/ |
| A D | renesas.rst | 10 and their usage steps.
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| /u-boot/arch/arm/dts/ |
| A D | sun50i-a64-pinephone-1.1.dts | 28 num-interpolated-steps = <50>;
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| A D | sun50i-a64-pinephone-1.2.dts | 34 num-interpolated-steps = <50>;
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| /u-boot/doc/develop/driver-model/ |
| A D | i2c-howto.rst | 22 The deadline for this work is the end of June 2017. If no one steps
48 this involves these steps:
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| /u-boot/doc/board/broadcom/ |
| A D | raspberrypi.rst | 11 and it's usage steps.
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| /u-boot/doc/board/AndesTech/ |
| A D | adp-ag101p.rst | 29 Build and boot steps
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| /u-boot/board/boundary/nitrogen6x/ |
| A D | 6x_upgrade.txt | 21 # two steps to prevent bricking
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| /u-boot/doc/usage/cmd/ |
| A D | wget.rst | 34 In the example the following steps are executed:
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| /u-boot/doc/SPI/ |
| A D | README.sh_qspi_test | 2 Simple steps used to test the SH-QSPI at U-Boot
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| A D | README.ti_qspi_dra_test | 2 Simple steps used to test the QSPI at U-Boot
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| /u-boot/doc/arch/ |
| A D | riscv.rst | 50 steps in the "Building U-Boot" section of the following document:
72 steps in the "Running U-Boot SPL" section of the following document:
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| /u-boot/drivers/phy/ |
| A D | phy-zynqmp.c | 190 u32 steps; member
328 STEPS_0_MASK, ssc->steps & STEPS_0_MASK); in xpsgtr_configure_pll()
333 (ssc->steps >> STEP_SIZE_SHIFT) & STEPS_1_MASK); in xpsgtr_configure_pll()
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| /u-boot/arch/x86/dts/ |
| A D | chromebook_coral.dts | 826 * [14:8] steps of delay for HS400, each 125ps
827 * [6:0] steps of delay for SDR104/HS200, each 125ps
833 * [30:24] steps of delay for SDR50, each 125ps
834 * [22:16] steps of delay for DDR50, each 125ps
835 * [14:8] steps of delay for SDR25/HS50, each 125ps
836 * [6:0] steps of delay for SDR12, each 125ps
842 * [30:24] steps of delay for SDR50, each 125ps
843 * [22:16] steps of delay for DDR50, each 125ps
844 * [14:8] steps of delay for SDR25/HS50, each 125ps
845 * [6:0] steps of delay for SDR12, each 125ps
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