| /u-boot/arch/mips/mach-mtmips/mt7628/ |
| A D | lowlevel_init.S | 33 lw t3, 0(t1)
34 andi t3, t3, 1
35 bnez t3, _rom_normal
40 lw t3, 0(t2)
47 lw t3, 0(t2)
53 sw t3, 0(t2)
56 lw t3, 0(t2)
57 ori t3, t3, (CPU_FDIV_M | CPU_FFRAC_M)
58 xori t3, t3, (CPU_FDIV_M | CPU_FFRAC_M)
59 ori t3, t3, ((1 << CPU_FDIV_S) | (1 << CPU_FFRAC_S))
[all …]
|
| /u-boot/arch/mips/mach-ath79/qca956x/ |
| A D | qca956x-ddr-tap.S | 54 or t3, t1, t2
57 sw t3, 0x1c(t0) /* TAP_CONTROL_0_ADDRESS */
58 sw t3, 0x20(t0) /* TAP_CONTROL_1_ADDRESS */
117 li t3, 0x000001fe
118 and t3, t3, t1
119 srl t3, t3, 0x1 /* No. of runs in the config register. */
120 bne t3, t2, _iterate_tap
170 li t3, 0x8 /* Default Tap to be used */
178 add t3, t1, t2
179 srl t3, t3, 0x1
[all …]
|
| /u-boot/arch/mips/mach-ath79/ar933x/ |
| A D | lowlevel_init.S | 79 li t3, 0x03
91 addi t3, t3, -1
92 bnez t3, 1b
222 li t3, 100
227 bgt t4, t3, 0b
230 li t3, 5
266 addi t3, t3, -1
267 bnez t3, 3b
|
| /u-boot/arch/riscv/cpu/ |
| A D | start.S | 308 li t3, R_RISCV_RELATIVE /* reloc type R_RISCV_RELATIVE */
309 bne t5, t3, 8f /* skip non-RISCV_RELOC entries */
310 LREG t3, 0(t1)
313 add t3, t3, t6 /* t3 <-- location to fix up in RAM */
314 SREG t5, 0(t3)
324 li t3, RELOC_TYPE
325 bne t5, t3, 10f /* skip non-addned entries */
327 LREG t3, 0(t1)
335 add t3, t3, t6 /* t3 <-- location to fix up in RAM */
336 SREG t5, 0(t3)
|
| /u-boot/arch/riscv/lib/ |
| A D | memcpy.S | 69 REG_L t3, 8*SZREG(a1)
80 REG_S t3, 8*SZREG(a0)
137 slli t3, a3, 3
138 sub t4, x0, t3 /* negate is okay as shift will only look at LSBs */
147 srl a4, a5, t3
|
| A D | memmove.S | 103 slli t3, a3, 3
104 sub t4, x0, t3 /* negate is okay as shift will only look at LSBs */
116 srl a2, a5, t3
|
| A D | interrupts.c | 50 regs->s10, regs->s11, regs->t3); in show_regs()
|
| /u-boot/arch/mips/include/asm/ |
| A D | regdef.h | 30 #define t3 $11 macro
81 #define t3 $15 macro
|
| /u-boot/arch/mips/mach-octeon/ |
| A D | lowlevel_init.S | 57 dsubu t3, ra, a7 /* t3 now has reloc offset */
60 daddu t0, t1, t3 /* t0 now has actual address of _start */
91 dsubu s0, s0, t3 /* Fixup return address with reloc offset */
|
| /u-boot/arch/mips/mach-mtmips/mt7621/spl/ |
| A D | launch_ll.S | 108 lw t3, LAUNCH_FLAGS(t0)
109 and t3, LAUNCH_FGO
110 beqz t3, start_poll
129 ori t3, LAUNCH_FGONE
130 sw t3, LAUNCH_FLAGS(t0)
|
| /u-boot/board/imgtec/malta/ |
| A D | lowlevel_init.S | 157 li t3, MALTA_MSC01_PCIMEM_MAP
160 sw t3, MSC01_PCI_SC2PMMAPL_OFS(t0)
165 li t3, MALTA_MSC01_PCIIO_MAP
168 sw t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
|
| /u-boot/arch/powerpc/lib/ |
| A D | _ashrdi3.S | 37 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
|
| /u-boot/scripts/coccinelle/null/ |
| A D | badzero.cocci | 216 @ t3 depends on !patch disable is_zero,isnt_zero @
232 p << t3.p;
238 p << t3.p;
|
| /u-boot/arch/riscv/include/asm/ |
| A D | ptrace.h | 41 unsigned long t3; member
|
| /u-boot/arch/arm/dts/ |
| A D | sun8i-t3-cqa3t-bv3.dts | 53 model = "t3-cqa3t-bv3";
54 compatible = "qihua,t3-cqa3t-bv3", "allwinner,sun8i-t3",
|
| A D | Makefile | 716 sun8i-t3-cqa3t-bv3.dtb \
|
| /u-boot/arch/mips/lib/ |
| A D | cache_init.S | 406 li t3, GCR_Cx_COHERENCE_EN
408 li t3, GCR_Cx_COHERENCE_DOM_EN
409 1: sw t3, GCR_Cx_COHERENCE(t0)
|
| /u-boot/drivers/mtd/nand/raw/ |
| A D | octeontx_nand.c | 347 t1, t2, t3, t4, t5, t6, t7, /* settable per ONFI-timing mode */ enumerator
852 cmd.u.ale_cmd.alen1 = t3; in ndf_queue_cmd_ale()
866 cmd.u.wr_cmd.wlen1 = t3; in ndf_queue_cmd_write()
1038 cmd.u.rd_cmd.rlen2 = t3; in ndf_read()
|
| /u-boot/ |
| A D | README | 2599 x28-31: temporaries (t3-6)
|