Home
last modified time | relevance | path

Searched refs:write_data (Results 1 – 6 of 6) sorted by relevance

/u-boot/drivers/mtd/nand/raw/
A Dkmeter1_nand.c19 #define write_data(val) out_8(CFG_NAND_DATA_REG, val) macro
69 write_data(cmd); in kpn_nand_hwcontrol()
85 write_data(buf[i]); in kpn_nand_write_buf()
/u-boot/drivers/misc/
A Dsifive-otp.c178 u32 write_data; in sifive_otp_write() local
209 write_data = *(write_buf++); in sifive_otp_write()
216 writel(((write_data >> bit) & 1), in sifive_otp_write()
/u-boot/drivers/ddr/marvell/a38x/
A Dddr3_training_leveling.c1289 u32 data, write_data; in ddr3_tip_wl_supp_align_phase_shift() local
1305 write_data = data & ~0x1df; in ddr3_tip_wl_supp_align_phase_shift()
1307 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1311 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
1319 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1323 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
1331 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1335 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
1343 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1347 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
/u-boot/tools/
A Difdtool.c706 static int write_data(char *image, int size, unsigned int addr, in write_data() function
1059 ret = write_data(image, size, -size, desc_fname, 0, 0); in main()
1070 ret = write_data(image, size, ifile->addr, in main()
/u-boot/drivers/net/
A Dmt7628-eth.c204 u32 phy_addr, u32 phy_register, u32 write_data) in mii_mgr_write() argument
215 data = FIELD_PREP(PCR0_WT_DATA, write_data) | in mii_mgr_write()
/u-boot/drivers/video/
A Dlogicore_dp_tx.c614 void *write_data) in aux_write() argument
623 bytes_to_write, (u8 *)write_data); in aux_write()

Completed in 25 milliseconds