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Searched refs:DfPstateTable (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_clk_mgr.c628 if (is_valid_clock_value(clock_table->DfPstateTable[i].FClk) && in dcn314_clk_mgr_helper_populate_bw_params()
629 clock_table->DfPstateTable[i].FClk > max_fclk) { in dcn314_clk_mgr_helper_populate_bw_params()
630 max_fclk = clock_table->DfPstateTable[i].FClk; in dcn314_clk_mgr_helper_populate_bw_params()
650 uint32_t min_fclk = clock_table->DfPstateTable[0].FClk; in dcn314_clk_mgr_helper_populate_bw_params()
655 clock_table->DfPstateTable[j].FClk < min_fclk && in dcn314_clk_mgr_helper_populate_bw_params()
657 min_fclk = clock_table->DfPstateTable[j].FClk; in dcn314_clk_mgr_helper_populate_bw_params()
680 clock_table->DfPstateTable[min_pstate].WckRatio); in dcn314_clk_mgr_helper_populate_bw_params()
696 clock_table->DfPstateTable[max_pstate].WckRatio); in dcn314_clk_mgr_helper_populate_bw_params()
894 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].FClk, in dcn314_clk_mgr_construct()
895 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].MemClk, in dcn314_clk_mgr_construct()
[all …]
A Ddcn314_smu.h57 DfPstateTable314_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c571 if (clock_table->DfPstateTable[i].FClk != 0) { in dcn31_clk_mgr_helper_populate_bw_params()
595 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; in dcn31_clk_mgr_helper_populate_bw_params()
596 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn31_clk_mgr_helper_populate_bw_params()
597 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; in dcn31_clk_mgr_helper_populate_bw_params()
598 switch (clock_table->DfPstateTable[j].WckRatio) { in dcn31_clk_mgr_helper_populate_bw_params()
608 …= find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->DfPstateTable[j].Voltage); in dcn31_clk_mgr_helper_populate_bw_params()
609 …= find_clk_for_voltage(clock_table, clock_table->SocClocks, clock_table->DfPstateTable[j].Voltage); in dcn31_clk_mgr_helper_populate_bw_params()
784 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].FClk, in dcn31_clk_mgr_construct()
785 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].MemClk, in dcn31_clk_mgr_construct()
786 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].Voltage); in dcn31_clk_mgr_construct()
A Ddcn31_smu.h138 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c575 if (clock_table->DfPstateTable[i].fclk != 0) { in vg_clk_mgr_helper_populate_bw_params()
590 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params()
591 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
592 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage; in vg_clk_mgr_helper_populate_bw_params()
593 …ntries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfPstateTable[j].voltage); in vg_clk_mgr_helper_populate_bw_params()
595 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params()
596 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
597 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage; in vg_clk_mgr_helper_populate_bw_params()
631 .DfPstateTable = {
A Ddcn301_smu.h109 df_pstate_t DfPstateTable[VG_NUM_FCLK_DPM_LEVELS]; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_clk_mgr.c495 if (clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i]) in dcn315_clk_mgr_helper_populate_bw_params()
511 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[max_pstate].FClk; in dcn315_clk_mgr_helper_populate_bw_params()
512 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn315_clk_mgr_helper_populate_bw_params()
523 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[0].FClk; in dcn315_clk_mgr_helper_populate_bw_params()
524 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[0].MemClk; in dcn315_clk_mgr_helper_populate_bw_params()
525 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[0].Voltage; in dcn315_clk_mgr_helper_populate_bw_params()
710 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].FClk, in dcn315_clk_mgr_construct()
711 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].MemClk, in dcn315_clk_mgr_construct()
712 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].Voltage); in dcn315_clk_mgr_construct()
A Ddcn315_smu.h77 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_clk_mgr.c494 if (clock_table->DfPstateTable[i].FClk != 0) { in dcn316_clk_mgr_helper_populate_bw_params()
520 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; in dcn316_clk_mgr_helper_populate_bw_params()
521 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn316_clk_mgr_helper_populate_bw_params()
522 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; in dcn316_clk_mgr_helper_populate_bw_params()
523 switch (clock_table->DfPstateTable[j].WckRatio) { in dcn316_clk_mgr_helper_populate_bw_params()
533 …temp = find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->DfPstateTable[j].Vol… in dcn316_clk_mgr_helper_populate_bw_params()
536 …temp = find_clk_for_voltage(clock_table, clock_table->SocClocks, clock_table->DfPstateTable[j].Vol… in dcn316_clk_mgr_helper_populate_bw_params()
A Ddcn316_smu.h85 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
A Dsmu13_driver_if_v13_0_5.h118 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
A Dsmu13_driver_if_yellow_carp.h129 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
A Dsmu11_driver_if_vangogh.h138 df_pstate_t DfPstateTable[NUM_FCLK_DPM_LEVELS]; member
A Dsmu13_driver_if_v13_0_4.h130 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Dvangogh_ppt.c545 *freq = clk_table->DfPstateTable[dpm_level].memclk; in vangogh_get_dpm_clk_limited()
551 *freq = clk_table->DfPstateTable[dpm_level].fclk; in vangogh_get_dpm_clk_limited()
2204 clock_table->FClocks[i].Freq = table->DfPstateTable[i].fclk; in vangogh_get_dpm_clock_table()
2205 clock_table->FClocks[i].Vol = table->DfPstateTable[i].voltage; in vangogh_get_dpm_clock_table()
2209 clock_table->MemClocks[i].Freq = table->DfPstateTable[i].memclk; in vangogh_get_dpm_clock_table()
2210 clock_table->MemClocks[i].Vol = table->DfPstateTable[i].voltage; in vangogh_get_dpm_clock_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Dsmu_v13_0_5_ppt.c682 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_5_get_dpm_freq_by_index()
687 *freq = clk_table->DfPstateTable[dpm_level].FClk; in smu_v13_0_5_get_dpm_freq_by_index()
A Dsmu_v13_0_4_ppt.c454 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_4_get_dpm_freq_by_index()
459 *freq = clk_table->DfPstateTable[dpm_level].FClk; in smu_v13_0_4_get_dpm_freq_by_index()
A Dyellow_carp_ppt.c816 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in yellow_carp_get_dpm_freq_by_index()
821 *freq = clk_table->DfPstateTable[dpm_level].FClk; in yellow_carp_get_dpm_freq_by_index()

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