| /linux/Documentation/arch/riscv/ |
| A D | vector.rst | 13 Two new prctl() calls are added to allow programs to manage the enablement 26 Sets the Vector enablement status of the calling thread, where the control 34 enablement status on execve(). The system-wide default setting can be 57 but the current enablement status is not off. Setting 59 the original enablement status. 64 then the enablement status will be decided by the system-wide 65 enablement status when execve() happen. 82 immediately. The enablement status specified in 107 developers to control the default Vector enablement status for userspace 119 Reading this file returns the current system default enablement status. [all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/ |
| A D | smu_internal.h | 91 #define smu_gfx_ulv_control(smu, enablement) smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement) argument 92 #define smu_deep_sleep_control(smu, enablement) smu_ppt_funcs(deep_sleep_control, 0, smu, enable… argument 95 #define smu_gpo_control(smu, enablement) smu_ppt_funcs(gpo_control, 0, smu, enablement) argument
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0.c | 1570 bool enablement) in smu_v14_0_gpo_control() argument 1576 enablement ? 1 : 0, in smu_v14_0_gpo_control() 1579 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v14_0_gpo_control() 1585 bool enablement) in smu_v14_0_deep_sleep_control() argument 1591 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v14_0_deep_sleep_control() 1599 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v14_0_deep_sleep_control() 1607 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v14_0_deep_sleep_control() 1623 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, enablement); in smu_v14_0_deep_sleep_control() 1631 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_VCN_BIT, enablement); in smu_v14_0_deep_sleep_control() 1658 bool enablement) in smu_v14_0_gfx_ulv_control() argument [all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| A D | smu_v14_0.h | 207 bool enablement); 223 bool enablement); 226 bool enablement);
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| A D | smu_v13_0.h | 252 bool enablement); 268 bool enablement); 271 bool enablement);
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| A D | smu_v11_0.h | 298 bool enablement); 301 bool enablement);
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| A D | amdgpu_smu.h | 1312 int (*gfx_ulv_control)(struct smu_context *smu, bool enablement); 1317 int (*deep_sleep_control)(struct smu_context *smu, bool enablement); 1339 int (*gpo_control)(struct smu_context *smu, bool enablement);
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0.c | 2130 bool enablement) in smu_v13_0_gpo_control() argument 2136 enablement ? 1 : 0, in smu_v13_0_gpo_control() 2139 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v13_0_gpo_control() 2145 bool enablement) in smu_v13_0_deep_sleep_control() argument 2151 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v13_0_deep_sleep_control() 2159 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v13_0_deep_sleep_control() 2167 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v13_0_deep_sleep_control() 2183 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, enablement); in smu_v13_0_deep_sleep_control() 2191 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_VCN_BIT, enablement); in smu_v13_0_deep_sleep_control() 2218 bool enablement) in smu_v13_0_gfx_ulv_control() argument [all …]
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| /linux/kernel/configs/ |
| A D | nopm.config | 10 # Triggers enablement via hibernate callbacks
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | smu_v11_0.c | 2123 bool enablement) in smu_v11_0_gfx_ulv_control() argument 2128 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement); in smu_v11_0_gfx_ulv_control() 2134 bool enablement) in smu_v11_0_deep_sleep_control() argument 2140 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v11_0_deep_sleep_control() 2148 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v11_0_deep_sleep_control() 2150 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control() 2156 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v11_0_deep_sleep_control() 2158 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control() 2164 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_SOCCLK_BIT, enablement); in smu_v11_0_deep_sleep_control() 2172 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, enablement); in smu_v11_0_deep_sleep_control() [all …]
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| /linux/Documentation/gpu/ |
| A D | panfrost.rst | 49 Where `N` is either `0` or `1`, depending on the desired enablement status.
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| /linux/Documentation/gpu/amdgpu/ |
| A D | ras.rst | 53 This test checks the RAS availability and enablement status for each supported IP block as well as
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| /linux/tools/testing/selftests/rcutorture/doc/ |
| A D | TREE_RCU-kconfig.txt | 11 CONFIG_NO_HZ_FULL -- Do two, one with partial CPU enablement.
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| /linux/drivers/gpu/drm/xe/ |
| A D | Kconfig.profile | 51 Configures the enablement of limitation on scheduler timeout
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| /linux/Documentation/devicetree/bindings/net/ |
| A D | amd-xgbe.txt | 43 - amd,serdes-blwc: Baseline wandering correction enablement
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| /linux/Documentation/devicetree/bindings/pci/ |
| A D | hisilicon,kirin-pcie.yaml | 56 Clock input enablement GPIOs from PCI devices like Ethernet, M.2 and
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| /linux/Documentation/devicetree/bindings/dsp/ |
| A D | fsl,dsp.yaml | 83 Phandle to syscon block which provide access for processor enablement
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| /linux/tools/testing/selftests/user_events/ |
| A D | abi_test.c | 234 TEST_F(user, enablement) { in TEST_F() argument
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| /linux/Documentation/PCI/ |
| A D | pci-iov-howto.rst | 37 Multiple methods are available for SR-IOV enablement.
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| /linux/arch/arm/boot/dts/st/ |
| A D | ste-ux500-samsung-janice.dts | 430 * GPIO-controlled voltage enablement: this drives 503 * The Low Noise Amplifier (LNA) power and enablement is controlled 991 /* Unused power enablement line, used in R0.0 and R0.1 boards */
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| /linux/Documentation/admin-guide/cifs/ |
| A D | todo.rst | 116 2) Improve xfstest's cifs/smb3 enablement and adapt xfstests where needed to test
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| /linux/Documentation/arch/x86/x86_64/ |
| A D | fsgs.rst | 90 FSGSBASE instructions enablement
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| /linux/Documentation/devicetree/bindings/powerpc/ |
| A D | ibm,powerpc-cpu-features.txt | 13 enablement, privilege, and compatibility metadata.
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| /linux/Documentation/arch/x86/ |
| A D | shstk.rst | 60 on a per-thread basis. The enablement status is inherited on clone, so if the
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| A D | maxim,max9286.yaml | 103 available ones controls the remote camera power enablement.
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