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Searched refs:vpe_get_reg_offset (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dvpe_v6_1.c82 WREG32(vpe_get_reg_offset(vpe, i, regVPEC_F32_CNTL), f32_cntl); in vpe_v6_1_halt()
136 ret = RREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL_6_1_1)); in vpe_v6_1_load_microcode()
138 ret = RREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL)); in vpe_v6_1_load_microcode()
143 WREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL_6_1_1), ret); in vpe_v6_1_load_microcode()
145 WREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL), ret); in vpe_v6_1_load_microcode()
161 f32_offset = vpe_get_reg_offset(vpe, 0, regVPEC_F32_CNTL); in vpe_v6_1_load_microcode()
188 WREG32(vpe_get_reg_offset(vpe, j, regVPEC_UCODE_ADDR), 0); in vpe_v6_1_load_microcode()
225 WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_RPTR), 0); in vpe_v6_1_ring_start()
227 WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_WPTR), 0); in vpe_v6_1_ring_start()
320 vpe_cntl = RREG32(vpe_get_reg_offset(vpe, 0, regVPEC_CNTL)); in vpe_v6_1_set_trap_irq_state()
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A Damdgpu_vpe.c135 dpm_ctl = RREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable)); in amdgpu_vpe_configure_dpm()
137 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), dpm_ctl); in amdgpu_vpe_configure_dpm()
213 dpm_ctl = RREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable)); in amdgpu_vpe_configure_dpm()
215 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), dpm_ctl); in amdgpu_vpe_configure_dpm()
619 WREG32(vpe_get_reg_offset(vpe, ring->me, preempt_reg), 1); in vpe_ring_preempt_ib()
635 WREG32(vpe_get_reg_offset(vpe, ring->me, preempt_reg), 0); in vpe_ring_preempt_ib()
680 rptr = RREG32(vpe_get_reg_offset(vpe, ring->me, vpe->regs.queue0_rb_rptr_hi)); in vpe_ring_get_rptr()
682 rptr |= RREG32(vpe_get_reg_offset(vpe, ring->me, vpe->regs.queue0_rb_rptr_lo)); in vpe_ring_get_rptr()
699 wptr = RREG32(vpe_get_reg_offset(vpe, ring->me, vpe->regs.queue0_rb_wptr_hi)); in vpe_ring_get_wptr()
734 WREG32(vpe_get_reg_offset(vpe, i, vpe->regs.queue0_rb_wptr_lo), in vpe_ring_set_wptr()
[all …]
A Damdgpu_vpe.h95 #define vpe_get_reg_offset(vpe, inst, offset) \ macro

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