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Searched refs:SDCDIV (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/mmc/
A Dbcm2835_sdhost.c55 #define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ macro
193 dev_dbg(host->dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
216 writel(0, host->ioaddr + SDCDIV); in bcm2835_reset_internal()
237 writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV); in bcm2835_reset_internal()
634 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()
650 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()

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