1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
4 */
5
6#include "stm32mp15-pinctrl.dtsi"
7#include "stm32mp15xxaa-pinctrl.dtsi"
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/mfd/st,stpmic1.h>
10
11/ {
12	aliases {
13		ethernet0 = &ethernet0;
14		ethernet1 = &ksz8851;
15		rtc0 = &hwrtc;
16		rtc1 = &rtc;
17	};
18
19	memory@c0000000 {
20		device_type = "memory";
21		reg = <0xC0000000 0x40000000>;
22	};
23
24	reserved-memory {
25		#address-cells = <1>;
26		#size-cells = <1>;
27		ranges;
28
29		mcuram2: mcuram2@10000000 {
30			compatible = "shared-dma-pool";
31			reg = <0x10000000 0x40000>;
32			no-map;
33		};
34
35		vdev0vring0: vdev0vring0@10040000 {
36			compatible = "shared-dma-pool";
37			reg = <0x10040000 0x1000>;
38			no-map;
39		};
40
41		vdev0vring1: vdev0vring1@10041000 {
42			compatible = "shared-dma-pool";
43			reg = <0x10041000 0x1000>;
44			no-map;
45		};
46
47		vdev0buffer: vdev0buffer@10042000 {
48			compatible = "shared-dma-pool";
49			reg = <0x10042000 0x4000>;
50			no-map;
51		};
52
53		mcuram: mcuram@30000000 {
54			compatible = "shared-dma-pool";
55			reg = <0x30000000 0x40000>;
56			no-map;
57		};
58
59		retram: retram@38000000 {
60			compatible = "shared-dma-pool";
61			reg = <0x38000000 0x10000>;
62			no-map;
63		};
64
65		optee_memory: optee@fe000000 {
66			reg = <0xfe000000 0x2000000>;
67			no-map;
68		};
69	};
70
71	ethernet_vio: vioregulator {
72		compatible = "regulator-fixed";
73		regulator-name = "vio";
74		regulator-min-microvolt = <3300000>;
75		regulator-max-microvolt = <3300000>;
76		gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
77		regulator-always-on;
78		regulator-boot-on;
79		vin-supply = <&vdd>;
80	};
81};
82
83&adc {
84	vdd-supply = <&vdd>;
85	vdda-supply = <&vdda>;
86	vref-supply = <&vdda>;
87	status = "okay";
88};
89
90&adc1 {
91	channel@0 {
92		reg = <0>;
93		st,min-sample-time-ns = <5000>;
94	};
95};
96
97&adc2 {
98	channel@1 {
99		reg = <1>;
100		st,min-sample-time-ns = <5000>;
101	};
102};
103
104&crc1 {
105	status = "okay";
106};
107
108&dac {
109	pinctrl-names = "default";
110	pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
111	vref-supply = <&vdda>;
112	status = "okay";
113
114	dac1: dac@1 {
115		status = "okay";
116	};
117	dac2: dac@2 {
118		status = "okay";
119	};
120};
121
122&dts {
123	status = "okay";
124};
125
126&ethernet0 {
127	status = "okay";
128	pinctrl-0 = <&ethernet0_rmii_pins_c &mco2_pins_a>;
129	pinctrl-1 = <&ethernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>;
130	pinctrl-names = "default", "sleep";
131	phy-mode = "rmii";
132	max-speed = <100>;
133	phy-handle = <&phy0>;
134
135	mdio {
136		#address-cells = <1>;
137		#size-cells = <0>;
138		compatible = "snps,dwmac-mdio";
139
140		phy0: ethernet-phy@1 {
141			reg = <1>;
142			/* LAN8710Ai */
143			compatible = "ethernet-phy-id0007.c0f0",
144				     "ethernet-phy-ieee802.3-c22";
145			clocks = <&rcc CK_MCO2>;
146			reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
147			reset-assert-us = <500>;
148			reset-deassert-us = <500>;
149			smsc,disable-energy-detect;
150			interrupt-parent = <&gpioi>;
151			interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
152		};
153	};
154};
155
156&fmc {
157	pinctrl-names = "default", "sleep";
158	pinctrl-0 = <&fmc_pins_b>;
159	pinctrl-1 = <&fmc_sleep_pins_b>;
160	status = "okay";
161
162	ksz8851: ethernet@1,0 {
163		compatible = "micrel,ks8851-mll";
164		reg = <1 0x0 0x2>, <1 0x2 0x20000>;
165		interrupt-parent = <&gpioc>;
166		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
167		bank-width = <2>;
168
169		/* Timing values are in nS */
170		st,fmc2-ebi-cs-mux-enable;
171		st,fmc2-ebi-cs-transaction-type = <4>;
172		st,fmc2-ebi-cs-buswidth = <16>;
173		st,fmc2-ebi-cs-address-setup-ns = <5>;
174		st,fmc2-ebi-cs-address-hold-ns = <5>;
175		st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
176		st,fmc2-ebi-cs-data-setup-ns = <45>;
177		st,fmc2-ebi-cs-data-hold-ns = <1>;
178		st,fmc2-ebi-cs-write-address-setup-ns = <5>;
179		st,fmc2-ebi-cs-write-address-hold-ns = <5>;
180		st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
181		st,fmc2-ebi-cs-write-data-setup-ns = <45>;
182		st,fmc2-ebi-cs-write-data-hold-ns = <1>;
183	};
184};
185
186&gpioa {
187	gpio-line-names = "", "", "", "",
188			  "", "", "DHCOM-K", "",
189			  "", "", "", "",
190			  "", "", "", "";
191};
192
193&gpiob {
194	gpio-line-names = "", "", "", "",
195			  "", "", "", "",
196			  "DHCOM-Q", "", "", "",
197			  "", "", "", "";
198};
199
200&gpioc {
201	gpio-line-names = "", "", "", "",
202			  "", "", "DHCOM-E", "",
203			  "", "", "", "",
204			  "", "", "", "";
205};
206
207&gpiod {
208	gpio-line-names = "", "", "", "",
209			  "", "", "DHCOM-B", "",
210			  "", "", "", "DHCOM-F",
211			  "DHCOM-D", "", "", "";
212};
213
214&gpioe {
215	gpio-line-names = "", "", "", "",
216			  "", "", "DHCOM-P", "",
217			  "", "", "", "",
218			  "", "", "", "";
219};
220
221&gpiof {
222	gpio-line-names = "", "", "", "DHCOM-A",
223			  "", "", "", "",
224			  "", "", "", "",
225			  "", "", "", "";
226};
227
228&gpiog {
229	gpio-line-names = "DHCOM-C", "", "", "",
230			  "", "", "", "",
231			  "DHCOM-L", "", "", "",
232			  "", "", "", "";
233};
234
235&gpioh {
236	gpio-line-names = "", "", "", "",
237			  "", "", "", "DHCOM-N",
238			  "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
239			  "DHCOM-T", "", "DHCOM-S", "";
240};
241
242&gpioi {
243	gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
244			  "DHCOM-R", "DHCOM-M", "", "",
245			  "", "", "", "",
246			  "", "", "", "";
247};
248
249&i2c4 {
250	pinctrl-names = "default";
251	pinctrl-0 = <&i2c4_pins_a>;
252	i2c-scl-rising-time-ns = <185>;
253	i2c-scl-falling-time-ns = <20>;
254	status = "okay";
255	/* spare dmas for other usage */
256	/delete-property/dmas;
257	/delete-property/dma-names;
258
259	hwrtc: rtc@32 {
260		compatible = "microcrystal,rv8803";
261		reg = <0x32>;
262	};
263
264	pmic: stpmic@33 {
265		compatible = "st,stpmic1";
266		reg = <0x33>;
267		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
268		interrupt-controller;
269		#interrupt-cells = <2>;
270		status = "okay";
271
272		regulators {
273			compatible = "st,stpmic1-regulators";
274			ldo1-supply = <&v3v3>;
275			ldo2-supply = <&v3v3>;
276			ldo3-supply = <&vdd_ddr>;
277			ldo5-supply = <&v3v3>;
278			ldo6-supply = <&v3v3>;
279			pwr_sw1-supply = <&bst_out>;
280			pwr_sw2-supply = <&bst_out>;
281
282			vddcore: buck1 {
283				regulator-name = "vddcore";
284				regulator-min-microvolt = <800000>;
285				regulator-max-microvolt = <1350000>;
286				regulator-always-on;
287				regulator-initial-mode = <0>;
288				regulator-over-current-protection;
289			};
290
291			vdd_ddr: buck2 {
292				regulator-name = "vdd_ddr";
293				regulator-min-microvolt = <1350000>;
294				regulator-max-microvolt = <1350000>;
295				regulator-always-on;
296				regulator-initial-mode = <0>;
297				regulator-over-current-protection;
298			};
299
300			vdd: buck3 {
301				regulator-name = "vdd";
302				regulator-min-microvolt = <3300000>;
303				regulator-max-microvolt = <3300000>;
304				regulator-always-on;
305				st,mask-reset;
306				regulator-initial-mode = <0>;
307				regulator-over-current-protection;
308			};
309
310			v3v3: buck4 {
311				regulator-name = "v3v3";
312				regulator-min-microvolt = <3300000>;
313				regulator-max-microvolt = <3300000>;
314				regulator-always-on;
315				regulator-over-current-protection;
316				regulator-initial-mode = <0>;
317			};
318
319			vdda: ldo1 {
320				regulator-name = "vdda";
321				regulator-always-on;
322				regulator-min-microvolt = <2900000>;
323				regulator-max-microvolt = <2900000>;
324				interrupts = <IT_CURLIM_LDO1 0>;
325			};
326
327			v2v8: ldo2 {
328				regulator-name = "v2v8";
329				regulator-min-microvolt = <2800000>;
330				regulator-max-microvolt = <2800000>;
331				interrupts = <IT_CURLIM_LDO2 0>;
332			};
333
334			vtt_ddr: ldo3 {
335				regulator-name = "vtt_ddr";
336				regulator-min-microvolt = <500000>;
337				regulator-max-microvolt = <750000>;
338				regulator-always-on;
339				regulator-over-current-protection;
340			};
341
342			vdd_usb: ldo4 {
343				regulator-name = "vdd_usb";
344				interrupts = <IT_CURLIM_LDO4 0>;
345			};
346
347			vdd_sd: ldo5 {
348				regulator-name = "vdd_sd";
349				regulator-min-microvolt = <2900000>;
350				regulator-max-microvolt = <2900000>;
351				interrupts = <IT_CURLIM_LDO5 0>;
352				regulator-boot-on;
353			};
354
355			v1v8: ldo6 {
356				regulator-name = "v1v8";
357				regulator-min-microvolt = <1800000>;
358				regulator-max-microvolt = <1800000>;
359				interrupts = <IT_CURLIM_LDO6 0>;
360			};
361
362			vref_ddr: vref_ddr {
363				regulator-name = "vref_ddr";
364				regulator-always-on;
365			};
366
367			bst_out: boost {
368				regulator-name = "bst_out";
369				interrupts = <IT_OCP_BOOST 0>;
370			};
371
372			vbus_otg: pwr_sw1 {
373				regulator-name = "vbus_otg";
374				interrupts = <IT_OCP_OTG 0>;
375			};
376
377			vbus_sw: pwr_sw2 {
378				regulator-name = "vbus_sw";
379				interrupts = <IT_OCP_SWOUT 0>;
380				regulator-active-discharge = <1>;
381			};
382		};
383
384		onkey {
385			compatible = "st,stpmic1-onkey";
386			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
387			interrupt-names = "onkey-falling", "onkey-rising";
388			power-off-time-sec = <10>;
389			status = "okay";
390		};
391
392		watchdog {
393			compatible = "st,stpmic1-wdt";
394			status = "disabled";
395		};
396	};
397
398	touchscreen@49 {
399		compatible = "ti,tsc2004";
400		reg = <0x49>;
401		vio-supply = <&v3v3>;
402		interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
403	};
404
405	eeprom@50 {
406		compatible = "atmel,24c02";
407		reg = <0x50>;
408		pagesize = <16>;
409	};
410};
411
412&ipcc {
413	status = "okay";
414};
415
416&iwdg2 {
417	timeout-sec = <32>;
418	status = "okay";
419};
420
421&m4_rproc {
422	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
423			<&vdev0vring1>, <&vdev0buffer>;
424	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
425	mbox-names = "vq0", "vq1", "shutdown", "detach";
426	interrupt-parent = <&exti>;
427	interrupts = <68 1>;
428	status = "okay";
429};
430
431&optee {
432	status = "okay";
433};
434
435&pwr_regulators {
436	vdd-supply = <&vdd>;
437	vdd_3v3_usbfs-supply = <&vdd_usb>;
438};
439
440&qspi {
441	pinctrl-names = "default", "sleep";
442	pinctrl-0 = <&qspi_clk_pins_a
443		     &qspi_bk1_pins_a
444		     &qspi_cs1_pins_a>;
445	pinctrl-1 = <&qspi_clk_sleep_pins_a
446		     &qspi_bk1_sleep_pins_a
447		     &qspi_cs1_sleep_pins_a>;
448	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
449	#address-cells = <1>;
450	#size-cells = <0>;
451	status = "okay";
452
453	flash0: flash@0 {
454		compatible = "jedec,spi-nor";
455		reg = <0>;
456		spi-rx-bus-width = <4>;
457		spi-max-frequency = <108000000>;
458		#address-cells = <1>;
459		#size-cells = <1>;
460	};
461};
462
463&rcc {
464	/* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */
465	clocks = <&rcc CK_MCO2>;
466	clock-names = "ETH_RX_CLK/ETH_REF_CLK";
467
468	/*
469	 * Set PLL4P output to 100 MHz to supply SDMMC with faster clock,
470	 * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
471	 * so that MCO2 behaves as a divider for the ETHRX clock here.
472	 */
473	assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
474	assigned-clock-parents = <&rcc PLL4_P>;
475	assigned-clock-rates = <50000000>, <100000000>;
476};
477
478&rng1 {
479	status = "okay";
480};
481
482&rtc {
483	status = "okay";
484};
485
486&sdmmc1 {
487	pinctrl-names = "default", "opendrain", "sleep", "init";
488	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
489	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
490	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
491	pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
492	cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
493	disable-wp;
494	st,sig-dir;
495	st,neg-edge;
496	st,use-ckin;
497	st,cmd-gpios = <&gpiod 2 0>;
498	st,ck-gpios = <&gpioc 12 0>;
499	st,ckin-gpios = <&gpioe 4 0>;
500	bus-width = <4>;
501	vmmc-supply = <&vdd_sd>;
502	status = "okay";
503};
504
505&sdmmc1_b4_pins_a {
506	/*
507	 * SD bus pull-up resistors:
508	 * - optional on SoMs with SD voltage translator
509	 * - mandatory on SoMs without SD voltage translator
510	 */
511	pins1 {
512		bias-pull-up;
513	};
514	pins2 {
515		bias-pull-up;
516	};
517};
518
519&sdmmc2 {
520	pinctrl-names = "default", "opendrain", "sleep";
521	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
522	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
523	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
524	non-removable;
525	no-sd;
526	no-sdio;
527	st,neg-edge;
528	bus-width = <8>;
529	vmmc-supply = <&v3v3>;
530	vqmmc-supply = <&v3v3>;
531	mmc-ddr-3_3v;
532	status = "okay";
533};
534
535&sdmmc3 {
536	pinctrl-names = "default", "opendrain", "sleep";
537	pinctrl-0 = <&sdmmc3_b4_pins_a>;
538	pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
539	pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
540	broken-cd;
541	st,neg-edge;
542	bus-width = <4>;
543	vmmc-supply = <&v3v3>;
544	vqmmc-supply = <&v3v3>;
545	mmc-ddr-3_3v;
546	status = "okay";
547};
548
549&uart4 {
550	pinctrl-names = "default";
551	pinctrl-0 = <&uart4_pins_a>;
552	/delete-property/dmas;
553	/delete-property/dma-names;
554	status = "okay";
555};
556