1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <eddie.huang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "mt8173.dtsi"
10
11/ {
12	model = "MediaTek MT8173 evaluation board";
13	chassis-type = "embedded";
14	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
15
16	aliases {
17		serial0 = &uart0;
18		serial1 = &uart1;
19		serial2 = &uart2;
20		serial3 = &uart3;
21	};
22
23	memory@40000000 {
24		device_type = "memory";
25		reg = <0 0x40000000 0 0x80000000>;
26	};
27
28	chosen { };
29
30	connector {
31		compatible = "hdmi-connector";
32		label = "hdmi";
33		type = "d";
34
35		port {
36			hdmi_connector_in: endpoint {
37				remote-endpoint = <&hdmi0_out>;
38			};
39		};
40	};
41
42	extcon_usb: extcon_iddig {
43		compatible = "linux,extcon-usb-gpio";
44		id-gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
45	};
46
47	usb_p1_vbus: regulator-usb-p1 {
48		compatible = "regulator-fixed";
49		regulator-name = "usb_vbus";
50		regulator-min-microvolt = <5000000>;
51		regulator-max-microvolt = <5000000>;
52		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
53		enable-active-high;
54	};
55
56	usb_p0_vbus: regulator-usb-p0 {
57		compatible = "regulator-fixed";
58		regulator-name = "vbus";
59		regulator-min-microvolt = <5000000>;
60		regulator-max-microvolt = <5000000>;
61		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
62		enable-active-high;
63	};
64
65	firmware {
66		optee {
67			compatible = "linaro,optee-tz";
68			method = "smc";
69		};
70	};
71};
72
73&mfg_async {
74	domain-supply = <&da9211_vgpu_reg>;
75};
76
77&cec {
78	status = "okay";
79};
80
81&cpu0 {
82	proc-supply = <&mt6397_vpca15_reg>;
83};
84
85&cpu1 {
86	proc-supply = <&mt6397_vpca15_reg>;
87};
88
89&cpu2 {
90	proc-supply = <&da9211_vcpu_reg>;
91	sram-supply = <&mt6397_vsramca7_reg>;
92};
93
94&cpu3 {
95	proc-supply = <&da9211_vcpu_reg>;
96	sram-supply = <&mt6397_vsramca7_reg>;
97};
98
99&dpi0 {
100	status = "okay";
101};
102
103&hdmi_phy {
104	status = "okay";
105};
106
107&hdmi0 {
108	status = "okay";
109
110	ports {
111		port@1 {
112			reg = <1>;
113
114			hdmi0_out: endpoint {
115				remote-endpoint = <&hdmi_connector_in>;
116			};
117		};
118	};
119};
120
121&i2c1 {
122	status = "okay";
123
124	buck: da9211@68 {
125		compatible = "dlg,da9211";
126		reg = <0x68>;
127
128		regulators {
129			da9211_vcpu_reg: BUCKA {
130				regulator-name = "VBUCKA";
131				regulator-min-microvolt = < 700000>;
132				regulator-max-microvolt = <1310000>;
133				regulator-min-microamp = <2000000>;
134				regulator-max-microamp = <4400000>;
135				regulator-ramp-delay = <10000>;
136				regulator-always-on;
137			};
138
139			da9211_vgpu_reg: BUCKB {
140				regulator-name = "VBUCKB";
141				regulator-min-microvolt = < 700000>;
142				regulator-max-microvolt = <1310000>;
143				regulator-min-microamp = <2000000>;
144				regulator-max-microamp = <3000000>;
145				regulator-ramp-delay = <10000>;
146			};
147		};
148	};
149};
150
151&mmc0 {
152	status = "okay";
153	pinctrl-names = "default", "state_uhs";
154	pinctrl-0 = <&mmc0_pins_default>;
155	pinctrl-1 = <&mmc0_pins_uhs>;
156	bus-width = <8>;
157	max-frequency = <50000000>;
158	cap-mmc-highspeed;
159	mediatek,hs200-cmd-int-delay = <26>;
160	mediatek,hs400-cmd-int-delay = <14>;
161	mediatek,hs400-cmd-resp-sel-rising;
162	vmmc-supply = <&mt6397_vemc_3v3_reg>;
163	vqmmc-supply = <&mt6397_vio18_reg>;
164	non-removable;
165};
166
167&mmc1 {
168	status = "okay";
169	pinctrl-names = "default", "state_uhs";
170	pinctrl-0 = <&mmc1_pins_default>;
171	pinctrl-1 = <&mmc1_pins_uhs>;
172	bus-width = <4>;
173	max-frequency = <50000000>;
174	cap-sd-highspeed;
175	sd-uhs-sdr25;
176	cd-gpios = <&pio 132 0>;
177	vmmc-supply = <&mt6397_vmch_reg>;
178	vqmmc-supply = <&mt6397_vmc_reg>;
179};
180
181&pio {
182	disp_pwm0_pins: disp_pwm0_pins {
183		pins1 {
184			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
185			output-low;
186		};
187	};
188
189	mmc0_pins_default: mmc0default {
190		pins_cmd_dat {
191			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
192				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
193				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
194				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
195				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
196				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
197				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
198				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
199				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
200			input-enable;
201			bias-pull-up;
202		};
203
204		pins_clk {
205			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
206			bias-pull-down;
207		};
208
209		pins_rst {
210			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
211			bias-pull-up;
212		};
213	};
214
215	mmc1_pins_default: mmc1default {
216		pins_cmd_dat {
217			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
218				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
219				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
220				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
221				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
222			input-enable;
223			drive-strength = <4>;
224			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
225		};
226
227		pins_clk {
228			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
229			bias-pull-down;
230			drive-strength = <4>;
231		};
232
233		pins_insert {
234			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
235			bias-pull-up;
236		};
237	};
238
239	mmc0_pins_uhs: mmc0 {
240		pins_cmd_dat {
241			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
242				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
243				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
244				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
245				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
246				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
247				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
248				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
249				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
250			input-enable;
251			drive-strength = <2>;
252			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
253		};
254
255		pins_clk {
256			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
257			drive-strength = <2>;
258			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
259		};
260
261		pins_rst {
262			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
263			bias-pull-up;
264		};
265	};
266
267	mmc1_pins_uhs: mmc1 {
268		pins_cmd_dat {
269			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
270				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
271				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
272				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
273				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
274			input-enable;
275			drive-strength = <4>;
276			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
277		};
278
279		pins_clk {
280			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
281			drive-strength = <4>;
282			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
283		};
284	};
285
286	usb_id_pins_float: usb_iddig_pull_up {
287		pins_iddig {
288			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
289			bias-pull-up;
290		};
291	};
292
293	usb_id_pins_ground: usb_iddig_pull_down {
294		pins_iddig {
295			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
296			bias-pull-down;
297		};
298	};
299};
300
301&pwm0 {
302	pinctrl-names = "default";
303	pinctrl-0 = <&disp_pwm0_pins>;
304	status = "okay";
305};
306
307&pwrap {
308	/* Only MT8173 E1 needs USB power domain */
309	power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
310
311	pmic: pmic {
312		compatible = "mediatek,mt6397";
313		interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_HIGH>;
314		interrupt-controller;
315		#interrupt-cells = <2>;
316
317		mt6397regulator: mt6397regulator {
318			compatible = "mediatek,mt6397-regulator";
319
320			mt6397_vpca15_reg: buck_vpca15 {
321				regulator-compatible = "buck_vpca15";
322				regulator-name = "vpca15";
323				regulator-min-microvolt = < 700000>;
324				regulator-max-microvolt = <1350000>;
325				regulator-ramp-delay = <12500>;
326				regulator-always-on;
327			};
328
329			mt6397_vpca7_reg: buck_vpca7 {
330				regulator-compatible = "buck_vpca7";
331				regulator-name = "vpca7";
332				regulator-min-microvolt = < 700000>;
333				regulator-max-microvolt = <1350000>;
334				regulator-ramp-delay = <12500>;
335				regulator-enable-ramp-delay = <115>;
336			};
337
338			mt6397_vsramca15_reg: buck_vsramca15 {
339				regulator-compatible = "buck_vsramca15";
340				regulator-name = "vsramca15";
341				regulator-min-microvolt = < 700000>;
342				regulator-max-microvolt = <1350000>;
343				regulator-ramp-delay = <12500>;
344				regulator-always-on;
345			};
346
347			mt6397_vsramca7_reg: buck_vsramca7 {
348				regulator-compatible = "buck_vsramca7";
349				regulator-name = "vsramca7";
350				regulator-min-microvolt = < 700000>;
351				regulator-max-microvolt = <1350000>;
352				regulator-ramp-delay = <12500>;
353				regulator-always-on;
354			};
355
356			mt6397_vcore_reg: buck_vcore {
357				regulator-compatible = "buck_vcore";
358				regulator-name = "vcore";
359				regulator-min-microvolt = < 700000>;
360				regulator-max-microvolt = <1350000>;
361				regulator-ramp-delay = <12500>;
362				regulator-always-on;
363			};
364
365			mt6397_vgpu_reg: buck_vgpu {
366				regulator-compatible = "buck_vgpu";
367				regulator-name = "vgpu";
368				regulator-min-microvolt = < 700000>;
369				regulator-max-microvolt = <1350000>;
370				regulator-ramp-delay = <12500>;
371				regulator-enable-ramp-delay = <115>;
372			};
373
374			mt6397_vdrm_reg: buck_vdrm {
375				regulator-compatible = "buck_vdrm";
376				regulator-name = "vdrm";
377				regulator-min-microvolt = <1200000>;
378				regulator-max-microvolt = <1400000>;
379				regulator-ramp-delay = <12500>;
380				regulator-always-on;
381			};
382
383			mt6397_vio18_reg: buck_vio18 {
384				regulator-compatible = "buck_vio18";
385				regulator-name = "vio18";
386				regulator-min-microvolt = <1620000>;
387				regulator-max-microvolt = <1980000>;
388				regulator-ramp-delay = <12500>;
389				regulator-always-on;
390			};
391
392			mt6397_vtcxo_reg: ldo_vtcxo {
393				regulator-compatible = "ldo_vtcxo";
394				regulator-name = "vtcxo";
395				regulator-always-on;
396			};
397
398			mt6397_va28_reg: ldo_va28 {
399				regulator-compatible = "ldo_va28";
400				regulator-name = "va28";
401				regulator-always-on;
402			};
403
404			mt6397_vcama_reg: ldo_vcama {
405				regulator-compatible = "ldo_vcama";
406				regulator-name = "vcama";
407				regulator-min-microvolt = <1500000>;
408				regulator-max-microvolt = <2800000>;
409				regulator-enable-ramp-delay = <218>;
410			};
411
412			mt6397_vio28_reg: ldo_vio28 {
413				regulator-compatible = "ldo_vio28";
414				regulator-name = "vio28";
415				regulator-always-on;
416			};
417
418			mt6397_vusb_reg: ldo_vusb {
419				regulator-compatible = "ldo_vusb";
420				regulator-name = "vusb";
421			};
422
423			mt6397_vmc_reg: ldo_vmc {
424				regulator-compatible = "ldo_vmc";
425				regulator-name = "vmc";
426				regulator-min-microvolt = <1800000>;
427				regulator-max-microvolt = <3300000>;
428				regulator-enable-ramp-delay = <218>;
429			};
430
431			mt6397_vmch_reg: ldo_vmch {
432				regulator-compatible = "ldo_vmch";
433				regulator-name = "vmch";
434				regulator-min-microvolt = <3000000>;
435				regulator-max-microvolt = <3300000>;
436				regulator-enable-ramp-delay = <218>;
437			};
438
439			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
440				regulator-compatible = "ldo_vemc3v3";
441				regulator-name = "vemc_3v3";
442				regulator-min-microvolt = <3000000>;
443				regulator-max-microvolt = <3300000>;
444				regulator-enable-ramp-delay = <218>;
445			};
446
447			mt6397_vgp1_reg: ldo_vgp1 {
448				regulator-compatible = "ldo_vgp1";
449				regulator-name = "vcamd";
450				regulator-min-microvolt = <1220000>;
451				regulator-max-microvolt = <3300000>;
452				regulator-enable-ramp-delay = <240>;
453			};
454
455			mt6397_vgp2_reg: ldo_vgp2 {
456				regulator-compatible = "ldo_vgp2";
457				regulator-name = "vcamio";
458				regulator-min-microvolt = <1000000>;
459				regulator-max-microvolt = <3300000>;
460				regulator-enable-ramp-delay = <218>;
461			};
462
463			mt6397_vgp3_reg: ldo_vgp3 {
464				regulator-compatible = "ldo_vgp3";
465				regulator-name = "vcamaf";
466				regulator-min-microvolt = <1200000>;
467				regulator-max-microvolt = <3300000>;
468				regulator-enable-ramp-delay = <218>;
469			};
470
471			mt6397_vgp4_reg: ldo_vgp4 {
472				regulator-compatible = "ldo_vgp4";
473				regulator-name = "vgp4";
474				regulator-min-microvolt = <1200000>;
475				regulator-max-microvolt = <3300000>;
476				regulator-enable-ramp-delay = <218>;
477			};
478
479			mt6397_vgp5_reg: ldo_vgp5 {
480				regulator-compatible = "ldo_vgp5";
481				regulator-name = "vgp5";
482				regulator-min-microvolt = <1200000>;
483				regulator-max-microvolt = <3000000>;
484				regulator-enable-ramp-delay = <218>;
485			};
486
487			mt6397_vgp6_reg: ldo_vgp6 {
488				regulator-compatible = "ldo_vgp6";
489				regulator-name = "vgp6";
490				regulator-min-microvolt = <1200000>;
491				regulator-max-microvolt = <3300000>;
492				regulator-enable-ramp-delay = <218>;
493			};
494
495			mt6397_vibr_reg: ldo_vibr {
496				regulator-compatible = "ldo_vibr";
497				regulator-name = "vibr";
498				regulator-min-microvolt = <1300000>;
499				regulator-max-microvolt = <3300000>;
500				regulator-enable-ramp-delay = <218>;
501			};
502		};
503	};
504};
505
506&pio {
507	spi_pins_a: spi0 {
508		pins_spi {
509			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
510				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
511				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
512				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
513		};
514	};
515};
516
517&spi {
518	pinctrl-names = "default";
519	pinctrl-0 = <&spi_pins_a>;
520	mediatek,pad-select = <0>;
521	status = "okay";
522};
523
524&ssusb {
525	vusb33-supply = <&mt6397_vusb_reg>;
526	vbus-supply = <&usb_p0_vbus>;
527	extcon = <&extcon_usb>;
528	dr_mode = "otg";
529	wakeup-source;
530	pinctrl-names = "default";
531	pinctrl-0 = <&usb_id_pins_float>;
532	status = "okay";
533};
534
535&uart0 {
536	status = "okay";
537};
538
539&usb_host {
540	vusb33-supply = <&mt6397_vusb_reg>;
541	vbus-supply = <&usb_p1_vbus>;
542	status = "okay";
543};
544