1 /*
2 * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <common/bl_common.h>
10 #include <common/debug.h>
11 #include <drivers/arm/smmu_v3.h>
12 #include <fconf_hw_config_getter.h>
13 #include <lib/fconf/fconf.h>
14 #include <lib/fconf/fconf_dyn_cfg_getter.h>
15 #include <lib/mmio.h>
16
17 #include <plat/arm/common/arm_config.h>
18 #include <plat/arm/common/plat_arm.h>
19 #include <plat/common/platform.h>
20
21 #include "fvp_private.h"
22
23 static const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
24
bl31_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)25 void __init bl31_early_platform_setup2(u_register_t arg0,
26 u_register_t arg1, u_register_t arg2, u_register_t arg3)
27 {
28 /* Initialize the console to provide early debug support */
29 arm_console_boot_init();
30
31 #if TRANSFER_LIST
32 arm_bl31_early_platform_setup(arg0, arg1, arg2, arg3);
33 #else
34 #if !RESET_TO_BL31 && !RESET_TO_BL2
35 const struct dyn_cfg_dtb_info_t *soc_fw_config_info;
36
37 INFO("BL31 FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1);
38 /* Fill the properties struct with the info from the config dtb */
39 fconf_populate("FW_CONFIG", arg1);
40
41 soc_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, SOC_FW_CONFIG_ID);
42 if (soc_fw_config_info != NULL) {
43 arg1 = soc_fw_config_info->config_addr;
44 }
45
46 /*
47 * arg2 is currently holding the 'secure' address of HW_CONFIG.
48 * But arm_bl31_early_platform_setup() below expects the 'non-secure'
49 * address of HW_CONFIG (which it will pass to BL33).
50 * This why we need to override arg2 here.
51 */
52 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
53 assert(hw_config_info != NULL);
54 assert(hw_config_info->secondary_config_addr != 0UL);
55 arg2 = hw_config_info->secondary_config_addr;
56 #endif /* !RESET_TO_BL31 && !RESET_TO_BL2 */
57 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
58 #endif /* TRANSFER_LIST */
59
60 /* Initialize the platform config for future decision making */
61 fvp_config_setup();
62
63 /*
64 * Initialize the correct interconnect for this cluster during cold
65 * boot. No need for locks as no other CPU is active.
66 */
67 fvp_interconnect_init();
68
69 /*
70 * Enable coherency in interconnect for the primary CPU's cluster.
71 * Earlier bootloader stages might already do this (e.g. Trusted
72 * Firmware's BL1 does it) but we can't assume so. There is no harm in
73 * executing this code twice anyway.
74 * FVP PSCI code will enable coherency for other clusters.
75 */
76 fvp_interconnect_enable();
77
78 /* Initialize System level generic or SP804 timer */
79 fvp_timer_init();
80
81 /* On FVP RevC, initialize SMMUv3 */
82 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) {
83 if (smmuv3_security_init(PLAT_FVP_SMMUV3_BASE) != 0) {
84 /*
85 * Don't proceed for smmuv3 initialization if the
86 * security init failed.
87 */
88 return;
89 }
90 /* SMMUv3 initialization failure is not fatal */
91 if (smmuv3_init(PLAT_FVP_SMMUV3_BASE) != 0) {
92 WARN("Failed initializing SMMU.\n");
93 }
94 }
95 }
96
97 #if !TRANSFER_LIST
bl31_plat_arch_setup(void)98 void __init bl31_plat_arch_setup(void)
99 {
100 int rc __unused;
101 uintptr_t hw_config_base_align __unused;
102 size_t mapped_size_align __unused;
103
104 arm_bl31_plat_arch_setup();
105
106 /*
107 * For RESET_TO_BL31 systems, BL31 is the first bootloader to run.
108 * So there is no BL2 to load the HW_CONFIG dtb into memory before
109 * control is passed to BL31. The code below relies on dynamic mapping
110 * capability, which is not supported by xlat tables lib V1.
111 * TODO: remove the ARM_XLAT_TABLES_LIB_V1 check when its support
112 * gets deprecated.
113 */
114 #if !RESET_TO_BL31 && !RESET_TO_BL2 && !ARM_XLAT_TABLES_LIB_V1
115 assert(hw_config_info != NULL);
116 assert(hw_config_info->config_addr != 0UL);
117
118 /* Page aligned address and size if necessary */
119 hw_config_base_align = page_align(hw_config_info->config_addr, DOWN);
120 mapped_size_align = page_align(hw_config_info->config_max_size, UP);
121
122 if ((hw_config_info->config_addr != hw_config_base_align) &&
123 (hw_config_info->config_max_size == mapped_size_align)) {
124 mapped_size_align += PAGE_SIZE;
125 }
126
127 /*
128 * map dynamically HW config region with its aligned base address and
129 * size
130 */
131 rc = mmap_add_dynamic_region((unsigned long long)hw_config_base_align,
132 hw_config_base_align,
133 mapped_size_align,
134 MT_RO_DATA);
135 if (rc != 0) {
136 ERROR("Error while mapping HW_CONFIG device tree (%d).\n", rc);
137 panic();
138 }
139
140 /* Populate HW_CONFIG device tree with the mapped address */
141 fconf_populate("HW_CONFIG", hw_config_info->config_addr);
142
143 /* unmap the HW_CONFIG memory region */
144 rc = mmap_remove_dynamic_region(hw_config_base_align, mapped_size_align);
145 if (rc != 0) {
146 ERROR("Error while unmapping HW_CONFIG device tree (%d).\n",
147 rc);
148 panic();
149 }
150 #endif /* !RESET_TO_BL31 && !RESET_TO_BL2 && !ARM_XLAT_TABLES_LIB_V1 */
151 }
152 #endif /* TRANSFER_LIST */
153
plat_get_syscnt_freq2(void)154 unsigned int plat_get_syscnt_freq2(void)
155 {
156 unsigned int counter_base_frequency;
157
158 #if !RESET_TO_BL31 && !RESET_TO_BL2
159 /* Get the frequency through FCONF API for HW_CONFIG */
160 counter_base_frequency = FCONF_GET_PROPERTY(hw_config, cpu_timer, clock_freq);
161 if (counter_base_frequency > 0U) {
162 return counter_base_frequency;
163 }
164 #endif
165
166 /* Read the frequency from Frequency modes table */
167 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF);
168
169 /* The first entry of the frequency modes table must not be 0 */
170 if (counter_base_frequency == 0U) {
171 panic();
172 }
173
174 return counter_base_frequency;
175 }
176