1config ARCH_MAP_SYSMEM 2 depends on SANDBOX 3 def_bool y 4 5config CREATE_ARCH_SYMLINK 6 bool 7 8config HAVE_ARCH_IOREMAP 9 bool 10 11config SYS_CACHE_SHIFT_4 12 bool 13 14config SYS_CACHE_SHIFT_5 15 bool 16 17config SYS_CACHE_SHIFT_6 18 bool 19 20config SYS_CACHE_SHIFT_7 21 bool 22 23config SYS_CACHELINE_SIZE 24 int 25 default 128 if SYS_CACHE_SHIFT_7 26 default 64 if SYS_CACHE_SHIFT_6 27 default 32 if SYS_CACHE_SHIFT_5 28 default 16 if SYS_CACHE_SHIFT_4 29 # Fall-back for MIPS 30 default 32 if MIPS 31 32config LINKER_LIST_ALIGN 33 int 34 default 32 if SANDBOX 35 default 8 if ARM64 || X86 36 default 4 37 help 38 Force the each linker list to be aligned to this boundary. This 39 is required if ll_entry_get() is used, since otherwise the linker 40 may add padding into the table, thus breaking it. 41 See linker_lists.rst for full details. 42 43choice 44 prompt "Architecture select" 45 default SANDBOX 46 47config ARC 48 bool "ARC architecture" 49 select ARC_TIMER 50 select CLK 51 select DM 52 select HAVE_PRIVATE_LIBGCC 53 select SUPPORT_OF_CONTROL 54 select SYS_CACHE_SHIFT_7 55 select TIMER 56 select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN 57 select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN 58 59config ARM 60 bool "ARM architecture" 61 select ARCH_SUPPORTS_LTO 62 select CREATE_ARCH_SYMLINK 63 select HAVE_PRIVATE_LIBGCC if !ARM64 64 select SUPPORT_ACPI 65 select SUPPORT_OF_CONTROL 66 67config M68K 68 bool "M68000 architecture" 69 select HAVE_PRIVATE_LIBGCC 70 select USE_PRIVATE_LIBGCC 71 select NEEDS_MANUAL_RELOC 72 select SYS_BOOT_GET_CMDLINE 73 select SYS_BOOT_GET_KBD 74 select SYS_CACHE_SHIFT_4 75 select SUPPORT_OF_CONTROL 76 77config MICROBLAZE 78 bool "MicroBlaze architecture" 79 select SUPPORT_OF_CONTROL 80 imply CMD_TIMER 81 imply SPL_REGMAP if SPL 82 imply SPL_TIMER if SPL 83 imply TIMER 84 imply XILINX_TIMER 85 86config MIPS 87 bool "MIPS architecture" 88 select HAVE_ARCH_IOREMAP 89 select HAVE_PRIVATE_LIBGCC 90 select SUPPORT_OF_CONTROL 91 select SPL_SEPARATE_BSS if SPL 92 93config NIOS2 94 bool "Nios II architecture" 95 select CPU 96 select DM 97 select DM_EVENT 98 select OF_CONTROL 99 select SUPPORT_OF_CONTROL 100 imply CMD_DM 101 102config PPC 103 bool "PowerPC architecture" 104 select HAVE_PRIVATE_LIBGCC 105 select SUPPORT_OF_CONTROL 106 select SYS_BOOT_GET_CMDLINE 107 select SYS_BOOT_GET_KBD 108 109config RISCV 110 bool "RISC-V architecture" 111 select CREATE_ARCH_SYMLINK 112 select SUPPORT_OF_CONTROL 113 select OF_CONTROL 114 select DM 115 select DM_EVENT 116 imply SPL_SEPARATE_BSS if SPL 117 imply DM_SERIAL 118 imply DM_MMC 119 imply DM_SPI 120 imply DM_SPI_FLASH 121 imply BLK 122 imply CLK 123 imply MTD 124 imply TIMER 125 imply CMD_DM 126 imply SPL_DM 127 imply SPL_OF_CONTROL 128 imply SPL_LIBCOMMON_SUPPORT 129 imply SPL_LIBGENERIC_SUPPORT 130 imply SPL_SERIAL 131 imply SPL_TIMER 132 133config SANDBOX 134 bool "Sandbox" 135 select ARCH_SUPPORTS_LTO 136 select BOARD_LATE_INIT 137 select BZIP2 138 select CMD_POWEROFF 139 select DM 140 select DM_EVENT 141 select DM_FUZZING_ENGINE 142 select DM_GPIO 143 select DM_I2C 144 select DM_KEYBOARD 145 select DM_MMC 146 select DM_SERIAL 147 select DM_SPI 148 select DM_SPI_FLASH 149 select GZIP_COMPRESSED 150 select IO_TRACE 151 select LZO 152 select OF_BOARD_SETUP 153 select PCI_ENDPOINT 154 select SPI 155 select SUPPORT_OF_CONTROL 156 select SYSRESET_CMD_POWEROFF 157 select SYS_CACHE_SHIFT_4 158 select IRQ 159 select SUPPORT_EXTENSION_SCAN 160 select SUPPORT_ACPI 161 imply BITREVERSE 162 select BLOBLIST 163 imply LTO 164 imply CMD_DM 165 imply CMD_EXCEPTION 166 imply CMD_GETTIME 167 imply CMD_HASH 168 imply CMD_IO 169 imply CMD_IOTRACE 170 imply CMD_LZMADEC 171 imply CMD_SF 172 imply CMD_SF_TEST 173 imply CRC32_VERIFY 174 imply FAT_WRITE 175 imply FIRMWARE 176 imply FUZZING_ENGINE_SANDBOX 177 imply HASH_VERIFY 178 imply LZMA 179 imply TEE 180 imply AVB_VERIFY 181 imply LIBAVB 182 imply CMD_AVB 183 imply PARTITION_TYPE_GUID 184 imply SCP03 185 imply CMD_SCP03 186 imply UDP_FUNCTION_FASTBOOT 187 imply VIRTIO_MMIO 188 imply VIRTIO_PCI 189 imply VIRTIO_SANDBOX 190 imply VIRTIO_BLK 191 imply VIRTIO_NET 192 imply DM_SOUND 193 imply PCI_SANDBOX_EP 194 imply PCH 195 imply PHYLIB 196 imply DM_MDIO 197 imply DM_MDIO_MUX 198 imply ACPI 199 imply ACPI_PMC 200 imply ACPI_PMC_SANDBOX 201 imply CMD_PMC 202 imply CMD_CLONE 203 imply SILENT_CONSOLE 204 imply BOOTARGS_SUBST 205 imply PHY_FIXED 206 imply DM_DSA 207 imply CMD_EXTENSION 208 imply KEYBOARD 209 imply PHYSMEM 210 imply GENERATE_ACPI_TABLE 211 imply BINMAN 212 213config SH 214 bool "SuperH architecture" 215 select HAVE_PRIVATE_LIBGCC 216 select SUPPORT_OF_CONTROL 217 218config X86 219 bool "x86 architecture" 220 select SUPPORT_SPL 221 select SUPPORT_TPL 222 select CREATE_ARCH_SYMLINK 223 select DM 224 select HAVE_ARCH_IOMAP 225 select HAVE_PRIVATE_LIBGCC 226 select OF_CONTROL 227 select PCI 228 select SUPPORT_ACPI 229 select SUPPORT_OF_CONTROL 230 select SYS_CACHE_SHIFT_6 231 select TIMER 232 select USE_PRIVATE_LIBGCC 233 select X86_TSC_TIMER 234 select IRQ 235 imply HAS_ROM if X86_RESET_VECTOR 236 imply BLK 237 imply CMD_DM 238 imply CMD_FPGA_LOADMK 239 imply CMD_GETTIME 240 imply CMD_IO 241 imply CMD_IRQ 242 imply CMD_PCI 243 imply CMD_SF 244 imply CMD_SF_TEST 245 imply CMD_ZBOOT 246 imply DM_GPIO 247 imply DM_KEYBOARD 248 imply DM_MMC 249 imply DM_RTC 250 imply DM_SCSI 251 imply DM_SERIAL 252 imply DM_SPI 253 imply DM_SPI_FLASH 254 imply DM_USB 255 imply VIDEO 256 imply SYSRESET 257 imply SPL_SYSRESET 258 imply SYSRESET_X86 259 imply USB_ETHER_ASIX 260 imply USB_ETHER_SMSC95XX 261 imply USB_HOST_ETHER 262 imply PCH 263 imply PHYSMEM 264 imply RTC_MC146818 265 imply ACPI 266 imply ACPIGEN if !QEMU && !EFI_APP 267 imply SYSINFO if GENERATE_SMBIOS_TABLE 268 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE 269 imply TIMESTAMP 270 271 # Thing to enable for when SPL/TPL are enabled: SPL 272 imply SPL_DM 273 imply SPL_OF_LIBFDT 274 imply SPL_DRIVERS_MISC 275 imply SPL_GPIO 276 imply SPL_PINCTRL 277 imply SPL_LIBCOMMON_SUPPORT 278 imply SPL_LIBGENERIC_SUPPORT 279 imply SPL_SERIAL 280 imply SPL_SPI_FLASH_SUPPORT 281 imply SPL_SPI 282 imply SPL_OF_CONTROL 283 imply SPL_TIMER 284 imply SPL_REGMAP 285 imply SPL_SYSCON 286 # TPL 287 imply TPL_DM 288 imply TPL_DRIVERS_MISC 289 imply TPL_GPIO 290 imply TPL_PINCTRL 291 imply TPL_LIBCOMMON_SUPPORT 292 imply TPL_LIBGENERIC_SUPPORT 293 imply TPL_SERIAL 294 imply TPL_OF_CONTROL 295 imply TPL_TIMER 296 imply TPL_REGMAP 297 imply TPL_SYSCON 298 299config XTENSA 300 bool "Xtensa architecture" 301 select CREATE_ARCH_SYMLINK 302 select SUPPORT_OF_CONTROL 303 304endchoice 305 306config SYS_ARCH 307 string 308 help 309 This option should contain the architecture name to build the 310 appropriate arch/<CONFIG_SYS_ARCH> directory. 311 All the architectures should specify this option correctly. 312 313config SYS_CPU 314 string 315 help 316 This option should contain the CPU name to build the correct 317 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory. 318 319 This is optional. For those targets without the CPU directory, 320 leave this option empty. 321 322config SYS_SOC 323 string 324 help 325 This option should contain the SoC name to build the directory 326 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>. 327 328 This is optional. For those targets without the SoC directory, 329 leave this option empty. 330 331config SYS_VENDOR 332 string 333 help 334 This option should contain the vendor name of the target board. 335 If it is set and 336 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common 337 directory is compiled. 338 If CONFIG_SYS_BOARD is also set, the sources under 339 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled. 340 341 This is optional. For those targets without the vendor directory, 342 leave this option empty. 343 344config SYS_BOARD 345 string 346 help 347 This option should contain the name of the target board. 348 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> 349 or board/<CONFIG_SYS_BOARD> directory is compiled depending on 350 whether CONFIG_SYS_VENDOR is set or not. 351 352 This is optional. For those targets without the board directory, 353 leave this option empty. 354 355config SYS_CONFIG_NAME 356 string 357 help 358 This option should contain the base name of board header file. 359 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h 360 should be included from include/config.h. 361 362config SYS_DISABLE_DCACHE_OPS 363 bool 364 help 365 This option disables dcache flush and dcache invalidation 366 operations. For example, on coherent systems where cache 367 operatios are not required, enable this option to avoid them. 368 Note that, its up to the individual architectures to implement 369 this functionality. 370 371config SYS_IMMR 372 hex "Address for the Internal Memory-Mapped Registers (IMMR) window" 373 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A 374 default 0xFF000000 if MPC8xx 375 default 0xF0000000 if ARCH_MPC8313 376 default 0xE0000000 if MPC83xx && !ARCH_MPC8313 377 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 378 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \ 379 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \ 380 ARCH_P2020 381 default SYS_CCSRBAR_DEFAULT 382 help 383 Address for the Internal Memory-Mapped Registers (IMMR) window used 384 to configure the features of many Freescale / NXP SoCs. 385 386config MONITOR_IS_IN_RAM 387 bool "U-Boot is loaded in to RAM by a pre-loader" 388 depends on M68K || NIOS2 389 390menu "Skipping low level initialization functions" 391 depends on ARM || MIPS || RISCV 392 393config SKIP_LOWLEVEL_INIT 394 bool "Skip calls to certain low level initialization functions" 395 help 396 If enabled, then certain low level initializations (like setting up 397 the memory controller) are omitted and/or U-Boot does not relocate 398 itself into RAM. 399 Normally this variable MUST NOT be defined. The only exception is 400 when U-Boot is loaded (to RAM) by some other boot loader or by a 401 debugger which performs these initializations itself. 402 403config SPL_SKIP_LOWLEVEL_INIT 404 bool "Skip calls to certain low level initialization functions in SPL" 405 depends on SPL 406 help 407 If enabled, then certain low level initializations (like setting up 408 the memory controller) are omitted and/or U-Boot does not relocate 409 itself into RAM. 410 Normally this variable MUST NOT be defined. The only exception is 411 when U-Boot is loaded (to RAM) by some other boot loader or by a 412 debugger which performs these initializations itself. 413 414config TPL_SKIP_LOWLEVEL_INIT 415 bool "Skip calls to certain low level initialization functions in TPL" 416 depends on SPL && ARM 417 help 418 If enabled, then certain low level initializations (like setting up 419 the memory controller) are omitted and/or U-Boot does not relocate 420 itself into RAM. 421 Normally this variable MUST NOT be defined. The only exception is 422 when U-Boot is loaded (to RAM) by some other boot loader or by a 423 debugger which performs these initializations itself. 424 425config SKIP_LOWLEVEL_INIT_ONLY 426 bool "Skip call to lowlevel_init during early boot ONLY" 427 depends on ARM 428 help 429 This allows just the call to lowlevel_init() to be skipped. The 430 normal CP15 init (such as enabling the instruction cache) is still 431 performed. 432 433config SPL_SKIP_LOWLEVEL_INIT_ONLY 434 bool "Skip call to lowlevel_init during early SPL boot ONLY" 435 depends on SPL && ARM 436 help 437 This allows just the call to lowlevel_init() to be skipped. The 438 normal CP15 init (such as enabling the instruction cache) is still 439 performed. 440 441config TPL_SKIP_LOWLEVEL_INIT_ONLY 442 bool "Skip call to lowlevel_init during early TPL boot ONLY" 443 depends on TPL && ARM 444 help 445 This allows just the call to lowlevel_init() to be skipped. The 446 normal CP15 init (such as enabling the instruction cache) is still 447 performed. 448 449endmenu 450 451config SYS_HAS_NONCACHED_MEMORY 452 bool "Enable reserving a non-cached memory area for drivers" 453 depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH) 454 help 455 This is useful for drivers that would otherwise require a lot of 456 explicit cache maintenance. For some drivers it's also impossible to 457 properly maintain the cache. For example if the regions that need to 458 be flushed are not a multiple of the cache-line size, *and* padding 459 cannot be allocated between the regions to align them (i.e. if the 460 HW requires a contiguous array of regions, and the size of each 461 region is not cache-aligned), then a flush of one region may result 462 in overwriting data that hardware has written to another region in 463 the same cache-line. This can happen for example in network drivers 464 where descriptors for buffers are typically smaller than the CPU 465 cache-line (e.g. 16 bytes vs. 32 or 64 bytes). 466 467config SYS_NONCACHED_MEMORY 468 hex "Size in bytes of the non-cached memory area" 469 depends on SYS_HAS_NONCACHED_MEMORY 470 default 0x100000 471 help 472 Size of non-cached memory area. This area of memory will be typically 473 located right below the malloc() area and mapped uncached in the MMU. 474 475source "arch/arc/Kconfig" 476source "arch/arm/Kconfig" 477source "arch/m68k/Kconfig" 478source "arch/microblaze/Kconfig" 479source "arch/mips/Kconfig" 480source "arch/nios2/Kconfig" 481source "arch/powerpc/Kconfig" 482source "arch/sandbox/Kconfig" 483source "arch/sh/Kconfig" 484source "arch/x86/Kconfig" 485source "arch/xtensa/Kconfig" 486source "arch/riscv/Kconfig" 487 488if ARM || M68K || PPC 489 490source "arch/Kconfig.nxp" 491 492endif 493 494source "board/keymile/Kconfig" 495 496if MIPS || MICROBLAZE 497 498choice 499 prompt "Endianness selection" 500 help 501 Some MIPS boards can be configured for either little or big endian 502 byte order. These modes require different U-Boot images. In general there 503 is one preferred byteorder for a particular system but some systems are 504 just as commonly used in the one or the other endianness. 505 506config SYS_BIG_ENDIAN 507 bool "Big endian" 508 depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE 509 510config SYS_LITTLE_ENDIAN 511 bool "Little endian" 512 depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE 513 514endchoice 515 516endif 517