1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
4  */
5 
6 #ifndef __ASM_ARC_CACHE_H
7 #define __ASM_ARC_CACHE_H
8 
9 #include <config.h>
10 
11 /*
12  * As of today we may handle any L1 cache line length right in software.
13  * For that essentially cache line length is a variable not constant.
14  * And to satisfy users of ARCH_DMA_MINALIGN we just use largest line length
15  * that may exist in either L1 or L2 (AKA SLC) caches on ARC.
16  */
17 #define ARCH_DMA_MINALIGN	128
18 
19 #ifndef __ASSEMBLY__
20 
21 void cache_init(void);
22 void flush_n_invalidate_dcache_all(void);
23 void sync_n_cleanup_cache_all(void);
24 
is_ioc_enabled(void)25 static const inline int is_ioc_enabled(void)
26 {
27 	return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
28 }
29 
30 /*
31  * We export SLC control functions to use them in platform configuration code.
32  * They maust not be used in any generic code!
33  */
34 void slc_enable(void);
35 void slc_disable(void);
36 
37 #endif /* __ASSEMBLY__ */
38 
39 #endif /* __ASM_ARC_CACHE_H */
40