1// SPDX-License-Identifier: GPL-2.0-only
2
3#include <dt-bindings/gpio/gpio.h>
4#include <dt-bindings/pinctrl/omap.h>
5
6/ {
7	compatible = "ti,dm816";
8	interrupt-parent = <&intc>;
9	#address-cells = <1>;
10	#size-cells = <1>;
11	chosen { };
12
13	aliases {
14		i2c0 = &i2c1;
15		i2c1 = &i2c2;
16		serial0 = &uart1;
17		serial1 = &uart2;
18		serial2 = &uart3;
19		ethernet0 = &eth0;
20		ethernet1 = &eth1;
21	};
22
23	cpus {
24		#address-cells = <1>;
25		#size-cells = <0>;
26		cpu@0 {
27			compatible = "arm,cortex-a8";
28			device_type = "cpu";
29			reg = <0>;
30		};
31	};
32
33	pmu {
34		compatible = "arm,cortex-a8-pmu";
35		interrupts = <3>;
36	};
37
38	/*
39	 * The soc node represents the soc top level view. It is used for IPs
40	 * that are not memory mapped in the MPU view or for the MPU itself.
41	 */
42	soc {
43		compatible = "ti,omap-infra";
44		mpu {
45			compatible = "ti,omap3-mpu";
46			ti,hwmods = "mpu";
47		};
48	};
49
50	/*
51	 * XXX: Use a flat representation of the dm816x interconnect.
52	 * The real dm816x interconnect network is quite complex. Since
53	 * it will not bring real advantage to represent that in DT
54	 * for the moment, just use a fake OCP bus entry to represent
55	 * the whole bus hierarchy.
56	 */
57	ocp {
58		compatible = "simple-bus";
59		reg = <0x44000000 0x10000>;
60		interrupts = <9 10>;
61		#address-cells = <1>;
62		#size-cells = <1>;
63		ranges;
64
65		prcm: prcm@48180000 {
66			compatible = "ti,dm816-prcm", "simple-bus";
67			reg = <0x48180000 0x4000>;
68			#address-cells = <1>;
69			#size-cells = <1>;
70			ranges = <0 0x48180000 0x4000>;
71
72			prcm_clocks: clocks {
73				#address-cells = <1>;
74				#size-cells = <0>;
75			};
76
77			prcm_clockdomains: clockdomains {
78			};
79		};
80
81		scrm: scrm@48140000 {
82			compatible = "ti,dm816-scrm", "simple-bus";
83			reg = <0x48140000 0x21000>;
84			#address-cells = <1>;
85			#size-cells = <1>;
86			#pinctrl-cells = <1>;
87			ranges = <0 0x48140000 0x21000>;
88
89			dm816x_pinmux: pinmux@800 {
90				compatible = "pinctrl-single";
91				reg = <0x800 0x50a>;
92				#address-cells = <1>;
93				#size-cells = <0>;
94				#pinctrl-cells = <1>;
95				pinctrl-single,register-width = <16>;
96				pinctrl-single,function-mask = <0xf>;
97			};
98
99			/* Device Configuration Registers */
100			scm_conf: syscon@600 {
101				compatible = "syscon", "simple-bus";
102				reg = <0x600 0x110>;
103				#address-cells = <1>;
104				#size-cells = <1>;
105				ranges = <0 0x600 0x110>;
106
107				usb_phy0: usb-phy@20 {
108					compatible = "ti,dm8168-usb-phy";
109					reg = <0x20 0x8>;
110					reg-names = "phy";
111					clocks = <&main_fapll 6>;
112					clock-names = "refclk";
113					#phy-cells = <0>;
114					syscon = <&scm_conf>;
115				};
116
117				usb_phy1: usb-phy@28 {
118					compatible = "ti,dm8168-usb-phy";
119					reg = <0x28 0x8>;
120					reg-names = "phy";
121					clocks = <&main_fapll 6>;
122					clock-names = "refclk";
123					#phy-cells = <0>;
124					syscon = <&scm_conf>;
125				};
126			};
127
128			scrm_clocks: clocks {
129				#address-cells = <1>;
130				#size-cells = <0>;
131			};
132
133			scrm_clockdomains: clockdomains {
134			};
135		};
136
137		edma: edma@49000000 {
138			compatible = "ti,edma3";
139			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
140			reg =   <0x49000000 0x10000>,
141			        <0x44e10f90 0x40>;
142			interrupts = <12 13 14>;
143			#dma-cells = <1>;
144		};
145
146		elm: elm@48080000 {
147			compatible = "ti,816-elm";
148			ti,hwmods = "elm";
149			reg = <0x48080000 0x2000>;
150			interrupts = <4>;
151		};
152
153		gpio1: gpio@48032000 {
154			compatible = "ti,omap4-gpio";
155			ti,hwmods = "gpio1";
156			ti,gpio-always-on;
157			reg = <0x48032000 0x1000>;
158			interrupts = <96>;
159			gpio-controller;
160			#gpio-cells = <2>;
161			interrupt-controller;
162			#interrupt-cells = <2>;
163		};
164
165		gpio2: gpio@4804c000 {
166			compatible = "ti,omap4-gpio";
167			ti,hwmods = "gpio2";
168			ti,gpio-always-on;
169			reg = <0x4804c000 0x1000>;
170			interrupts = <98>;
171			gpio-controller;
172			#gpio-cells = <2>;
173			interrupt-controller;
174			#interrupt-cells = <2>;
175		};
176
177		gpmc: gpmc@50000000 {
178			compatible = "ti,am3352-gpmc";
179			ti,hwmods = "gpmc";
180			reg = <0x50000000 0x2000>;
181			#address-cells = <2>;
182			#size-cells = <1>;
183			interrupts = <100>;
184			dmas = <&edma 52>;
185			dma-names = "rxtx";
186			gpmc,num-cs = <6>;
187			gpmc,num-waitpins = <2>;
188			interrupt-controller;
189			#interrupt-cells = <2>;
190			gpio-controller;
191			#gpio-cells = <2>;
192		};
193
194		i2c1: i2c@48028000 {
195			compatible = "ti,omap4-i2c";
196			ti,hwmods = "i2c1";
197			reg = <0x48028000 0x1000>;
198			#address-cells = <1>;
199			#size-cells = <0>;
200			interrupts = <70>;
201			dmas = <&edma 58 &edma 59>;
202			dma-names = "tx", "rx";
203		};
204
205		i2c2: i2c@4802a000 {
206			compatible = "ti,omap4-i2c";
207			ti,hwmods = "i2c2";
208			reg = <0x4802a000 0x1000>;
209			#address-cells = <1>;
210			#size-cells = <0>;
211			interrupts = <71>;
212			dmas = <&edma 60 &edma 61>;
213			dma-names = "tx", "rx";
214		};
215
216		intc: interrupt-controller@48200000 {
217			compatible = "ti,dm816-intc";
218			interrupt-controller;
219			#interrupt-cells = <1>;
220			reg = <0x48200000 0x1000>;
221		};
222
223		rtc: rtc@480c0000 {
224			compatible = "ti,am3352-rtc", "ti,da830-rtc";
225			reg = <0x480c0000 0x1000>;
226			interrupts = <75 76>;
227			ti,hwmods = "rtc";
228		};
229
230		mailbox: mailbox@480c8000 {
231			compatible = "ti,omap4-mailbox";
232			reg = <0x480c8000 0x2000>;
233			interrupts = <77>;
234			ti,hwmods = "mailbox";
235			#mbox-cells = <1>;
236			ti,mbox-num-users = <4>;
237			ti,mbox-num-fifos = <12>;
238			mbox_dsp: mbox-dsp {
239				ti,mbox-tx = <3 0 0>;
240				ti,mbox-rx = <0 0 0>;
241			};
242		};
243
244		spinbox: spinbox@480ca000 {
245			compatible = "ti,omap4-hwspinlock";
246			reg = <0x480ca000 0x2000>;
247			ti,hwmods = "spinbox";
248			#hwlock-cells = <1>;
249		};
250
251		mdio: mdio@4a100800 {
252			compatible = "ti,davinci_mdio";
253			#address-cells = <1>;
254			#size-cells = <0>;
255			reg = <0x4a100800 0x100>;
256			ti,hwmods = "davinci_mdio";
257			bus_freq = <1000000>;
258			phy0: ethernet-phy@0 {
259				reg = <1>;
260			};
261			phy1: ethernet-phy@1 {
262				reg = <2>;
263			};
264		};
265
266		eth0: ethernet@4a100000 {
267			compatible = "ti,dm816-emac";
268			ti,hwmods = "emac0";
269			reg = <0x4a100000 0x800
270			       0x4a100900 0x3700>;
271			clocks = <&sysclk24_ck>;
272			syscon = <&scm_conf>;
273			ti,davinci-ctrl-reg-offset = <0>;
274			ti,davinci-ctrl-mod-reg-offset = <0x900>;
275			ti,davinci-ctrl-ram-offset = <0x2000>;
276			ti,davinci-ctrl-ram-size = <0x2000>;
277			interrupts = <40 41 42 43>;
278			phy-handle = <&phy0>;
279		};
280
281		eth1: ethernet@4a120000 {
282			compatible = "ti,dm816-emac";
283			ti,hwmods = "emac1";
284			reg = <0x4a120000 0x4000>;
285			clocks = <&sysclk24_ck>;
286			syscon = <&scm_conf>;
287			ti,davinci-ctrl-reg-offset = <0>;
288			ti,davinci-ctrl-mod-reg-offset = <0x900>;
289			ti,davinci-ctrl-ram-offset = <0x2000>;
290			ti,davinci-ctrl-ram-size = <0x2000>;
291			interrupts = <44 45 46 47>;
292			phy-handle = <&phy1>;
293		};
294
295		mcspi1: spi@48030000 {
296			compatible = "ti,omap4-mcspi";
297			reg = <0x48030000 0x1000>;
298			#address-cells = <1>;
299			#size-cells = <0>;
300			interrupts = <65>;
301			ti,spi-num-cs = <4>;
302			ti,hwmods = "mcspi1";
303			dmas = <&edma 16 &edma 17
304				&edma 18 &edma 19
305				&edma 20 &edma 21
306				&edma 22 &edma 23>;
307			dma-names = "tx0", "rx0", "tx1", "rx1",
308				    "tx2", "rx2", "tx3", "rx3";
309		};
310
311		mmc1: mmc@48060000 {
312			compatible = "ti,omap4-hsmmc";
313			reg = <0x48060000 0x11000>;
314			ti,hwmods = "mmc1";
315			interrupts = <64>;
316			dmas = <&edma 24 &edma 25>;
317			dma-names = "tx", "rx";
318		};
319
320		timer1: timer@4802e000 {
321			compatible = "ti,dm816-timer";
322			reg = <0x4802e000 0x2000>;
323			interrupts = <67>;
324			ti,hwmods = "timer1";
325			ti,timer-alwon;
326		};
327
328		timer2: timer@48040000 {
329			compatible = "ti,dm816-timer";
330			reg = <0x48040000 0x2000>;
331			interrupts = <68>;
332			ti,hwmods = "timer2";
333		};
334
335		timer3: timer@48042000 {
336			compatible = "ti,dm816-timer";
337			reg = <0x48042000 0x2000>;
338			interrupts = <69>;
339			ti,hwmods = "timer3";
340		};
341
342		timer4: timer@48044000 {
343			compatible = "ti,dm816-timer";
344			reg = <0x48044000 0x2000>;
345			interrupts = <92>;
346			ti,hwmods = "timer4";
347			ti,timer-pwm;
348		};
349
350		timer5: timer@48046000 {
351			compatible = "ti,dm816-timer";
352			reg = <0x48046000 0x2000>;
353			interrupts = <93>;
354			ti,hwmods = "timer5";
355			ti,timer-pwm;
356		};
357
358		timer6: timer@48048000 {
359			compatible = "ti,dm816-timer";
360			reg = <0x48048000 0x2000>;
361			interrupts = <94>;
362			ti,hwmods = "timer6";
363			ti,timer-pwm;
364		};
365
366		timer7: timer@4804a000 {
367			compatible = "ti,dm816-timer";
368			reg = <0x4804a000 0x2000>;
369			interrupts = <95>;
370			ti,hwmods = "timer7";
371			ti,timer-pwm;
372		};
373
374		uart1: serial@48020000 {
375			compatible = "ti,am3352-uart", "ti,omap3-uart";
376			ti,hwmods = "uart1";
377			reg = <0x48020000 0x2000>;
378			clock-frequency = <48000000>;
379			interrupts = <72>;
380			dmas = <&edma 26 &edma 27>;
381			dma-names = "tx", "rx";
382		};
383
384		uart2: serial@48022000 {
385			compatible = "ti,am3352-uart", "ti,omap3-uart";
386			ti,hwmods = "uart2";
387			reg = <0x48022000 0x2000>;
388			clock-frequency = <48000000>;
389			interrupts = <73>;
390			dmas = <&edma 28 &edma 29>;
391			dma-names = "tx", "rx";
392		};
393
394		uart3: serial@48024000 {
395			compatible = "ti,am3352-uart", "ti,omap3-uart";
396			ti,hwmods = "uart3";
397			reg = <0x48024000 0x2000>;
398			clock-frequency = <48000000>;
399			interrupts = <74>;
400			dmas = <&edma 30 &edma 31>;
401			dma-names = "tx", "rx";
402		};
403
404		/* NOTE: USB needs a transceiver driver for phys to work */
405		usb: usb_otg_hs@47401000 {
406			compatible = "ti,am33xx-usb";
407			reg = <0x47401000 0x400000>;
408			ranges;
409			#address-cells = <1>;
410			#size-cells = <1>;
411			ti,hwmods = "usb_otg_hs";
412
413			usb0: usb@47401000 {
414				compatible = "ti,musb-dm816";
415				reg = <0x47401400 0x400
416				       0x47401000 0x200>;
417				reg-names = "mc", "control";
418				interrupts = <18>;
419				interrupt-names = "mc";
420				dr_mode = "host";
421				interface-type = <0>;
422				phys = <&usb_phy0>;
423				phy-names = "usb2-phy";
424				mentor,multipoint = <1>;
425				mentor,num-eps = <16>;
426				mentor,ram-bits = <12>;
427				mentor,power = <500>;
428
429				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
430					&cppi41dma  2 0 &cppi41dma  3 0
431					&cppi41dma  4 0 &cppi41dma  5 0
432					&cppi41dma  6 0 &cppi41dma  7 0
433					&cppi41dma  8 0 &cppi41dma  9 0
434					&cppi41dma 10 0 &cppi41dma 11 0
435					&cppi41dma 12 0 &cppi41dma 13 0
436					&cppi41dma 14 0 &cppi41dma  0 1
437					&cppi41dma  1 1 &cppi41dma  2 1
438					&cppi41dma  3 1 &cppi41dma  4 1
439					&cppi41dma  5 1 &cppi41dma  6 1
440					&cppi41dma  7 1 &cppi41dma  8 1
441					&cppi41dma  9 1 &cppi41dma 10 1
442					&cppi41dma 11 1 &cppi41dma 12 1
443					&cppi41dma 13 1 &cppi41dma 14 1>;
444				dma-names =
445					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
446					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
447					"rx14", "rx15",
448					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
449					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
450					"tx14", "tx15";
451			};
452
453			usb1: usb@47401800 {
454				compatible = "ti,musb-dm816";
455				reg = <0x47401c00 0x400
456				       0x47401800 0x200>;
457				reg-names = "mc", "control";
458				interrupts = <19>;
459				interrupt-names = "mc";
460				dr_mode = "host";
461				interface-type = <0>;
462				phys = <&usb_phy1>;
463				phy-names = "usb2-phy";
464				mentor,multipoint = <1>;
465				mentor,num-eps = <16>;
466				mentor,ram-bits = <12>;
467				mentor,power = <500>;
468
469				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
470					&cppi41dma 17 0 &cppi41dma 18 0
471					&cppi41dma 19 0 &cppi41dma 20 0
472					&cppi41dma 21 0 &cppi41dma 22 0
473					&cppi41dma 23 0 &cppi41dma 24 0
474					&cppi41dma 25 0 &cppi41dma 26 0
475					&cppi41dma 27 0 &cppi41dma 28 0
476					&cppi41dma 29 0 &cppi41dma 15 1
477					&cppi41dma 16 1 &cppi41dma 17 1
478					&cppi41dma 18 1 &cppi41dma 19 1
479					&cppi41dma 20 1 &cppi41dma 21 1
480					&cppi41dma 22 1 &cppi41dma 23 1
481					&cppi41dma 24 1 &cppi41dma 25 1
482					&cppi41dma 26 1 &cppi41dma 27 1
483					&cppi41dma 28 1 &cppi41dma 29 1>;
484				dma-names =
485					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
486					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
487					"rx14", "rx15",
488					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
489					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
490					"tx14", "tx15";
491			};
492
493			cppi41dma: dma-controller@47402000 {
494				compatible = "ti,am3359-cppi41";
495				reg =  <0x47400000 0x1000
496					0x47402000 0x1000
497					0x47403000 0x1000
498					0x47404000 0x4000>;
499				reg-names = "glue", "controller", "scheduler", "queuemgr";
500				interrupts = <17>;
501				interrupt-names = "glue";
502				#dma-cells = <2>;
503				#dma-channels = <30>;
504				#dma-requests = <256>;
505			};
506		};
507
508		wd_timer2: wd_timer@480c2000 {
509			compatible = "ti,omap3-wdt";
510			ti,hwmods = "wd_timer";
511			reg = <0x480c2000 0x1000>;
512			interrupts = <0>;
513		};
514	};
515};
516
517#include "dm816x-clocks.dtsi"
518