1 /* SPDX-License-Identifier: GPL-2.0+ */
2 
3 #ifndef _NPCM_OTP_H_
4 #define _NPCM_OTP_H_
5 
6 #ifdef CONFIG_ARCH_NPCM8XX
7 enum {
8 	NPCM_KEY_SA    = 0,
9 	NPCM_FUSE_SA   = 0,
10 	NPCM_NUM_OF_SA   = 1
11 };
12 #else
13 enum {
14 	NPCM_KEY_SA    = 0,
15 	NPCM_FUSE_SA   = 1,
16 	NPCM_NUM_OF_SA = 2
17 };
18 #endif
19 
20 struct npcm_otp_regs {
21 	unsigned int fst;
22 	unsigned int faddr;
23 	unsigned int fdata;
24 	unsigned int fcfg;
25 	unsigned int fustrap_fkeyind;
26 	unsigned int fctl;
27 };
28 
29 #define FST_RDY                 BIT(0)
30 #define FST_RDST                BIT(1)
31 #define FST_RIEN                BIT(2)
32 
33 #ifdef CONFIG_ARCH_NPCM8XX
34 #define FADDR_BYTEADDR(addr)        ((addr) << 3)
35 #define FADDR_BITPOS(pos)           ((pos) << 0)
36 #define FADDR_VAL(addr, pos)        (FADDR_BITPOS(pos) | FADDR_BYTEADDR(addr))
37 #define FADDR_IN_PROG               BIT(16)
38 #else
39 #define FADDR_BYTEADDR(addr)    ((addr) << 0)
40 #define FADDR_BITPOS(pos)       ((pos) << 10)
41 #define FADDR_VAL(addr, pos)    (FADDR_BYTEADDR(addr) | FADDR_BITPOS(pos))
42 #define FADDR_IN_PROG               BIT(16)
43 #endif
44 
45 #define FDATA_MASK              (0xff)
46 
47 #define FUSTRAP_O_SECBOOT       BIT(23)
48 
49 #define FCFG_FDIS               BIT(31)
50 
51 #define FKEYIND_KVAL            BIT(0)
52 #define FKEYIND_KSIZE_MASK      (0x00000070)
53 #define FKEYIND_KSIZE_128       (0x40)
54 #define FKEYIND_KSIZE_192       (0x50)
55 #define FKEYIND_KSIZE_256       (0x60)
56 #define FKEYIND_KIND_MASK       (0x000c0000)
57 #define FKEYIND_KIND_KEY(indx)  ((indx) << 18)
58 
59 // Program cycle initiation values (sequence of two adjacent writes)
60 #define PROGRAM_ARM             0x1
61 #define PROGRAM_INIT            0xBF79E5D0
62 
63 #define OTP2_BASE               0xF018A000
64 #define FUSTRAP                 (OTP2_BASE + 0x10)
65 
66 // Read cycle initiation value
67 #define READ_INIT               0x02
68 
69 // Value to clean FDATA contents
70 #define FDATA_CLEAN_VALUE       0x01
71 
72 #ifdef CONFIG_ARCH_NPCM8XX
73 #define NPCM_OTP_ARR_BYTE_SIZE        8192
74 #else
75 #define NPCM_OTP_ARR_BYTE_SIZE        1024
76 #endif
77 
78 #define MIN_PROGRAM_PULSES               4
79 #define MAX_PROGRAM_PULSES               20
80 #define NPCM_OTP_ARR_BYTE_SIZE        1024
81 
82 int fuse_prog_image(u32 bank, uintptr_t address);
83 int  fuse_program_data(u32 bank, u32 word, u8 *data, u32 size);
84 int  npcm_otp_select_key(u8 key_index);
85 bool npcm_otp_is_fuse_array_disabled(u32 arr);
86 void npcm_otp_nibble_parity_ecc_encode(u8 *datain, u8 *dataout, u32 size);
87 void npcm_otp_majority_rule_ecc_encode(u8 *datain, u8 *dataout, u32 size);
88 void npcm_arch_preboot_os(void);
89 
90 #endif
91