1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AM62A7: SoC specific initialization
4 *
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8 #include <spl.h>
9 #include <asm/io.h>
10 #include <asm/arch/hardware.h>
11 #include "sysfw-loader.h"
12 #include "common.h"
13 #include <dm.h>
14 #include <dm/uclass-internal.h>
15 #include <dm/pinctrl.h>
16
17 /*
18 * This uninitialized global variable would normal end up in the .bss section,
19 * but the .bss is cleared between writing and reading this variable, so move
20 * it to the .data section.
21 */
22 u32 bootindex __section(".data");
23 static struct rom_extended_boot_data bootdata __section(".data");
24
store_boot_info_from_rom(void)25 static void store_boot_info_from_rom(void)
26 {
27 bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
28
29 if (IS_ENABLED(CONFIG_CPU_V7R)) {
30 memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
31 sizeof(struct rom_extended_boot_data));
32 }
33 }
34
ctrl_mmr_unlock(void)35 static void ctrl_mmr_unlock(void)
36 {
37 /* Unlock all WKUP_CTRL_MMR0 module registers */
38 mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
39 mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
40 mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
41 mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
42 mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
43 mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
44 mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
45 mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
46
47 /* Unlock all CTRL_MMR0 module registers */
48 mmr_unlock(CTRL_MMR0_BASE, 0);
49 mmr_unlock(CTRL_MMR0_BASE, 1);
50 mmr_unlock(CTRL_MMR0_BASE, 2);
51 mmr_unlock(CTRL_MMR0_BASE, 4);
52 mmr_unlock(CTRL_MMR0_BASE, 5);
53 mmr_unlock(CTRL_MMR0_BASE, 6);
54
55 /* Unlock all MCU_CTRL_MMR0 module registers */
56 mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
57 mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
58 mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
59 mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
60 mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
61 mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
62
63 /* Unlock PADCFG_CTRL_MMR padconf registers */
64 mmr_unlock(PADCFG_MMR0_BASE, 1);
65 mmr_unlock(PADCFG_MMR1_BASE, 1);
66 }
67
68 #if (IS_ENABLED(CONFIG_CPU_V7R))
setup_qos(void)69 static void setup_qos(void)
70 {
71 u32 i;
72
73 for (i = 0; i < am62a_qos_count; i++)
74 writel(am62a_qos_data[i].val, (uintptr_t)am62a_qos_data[i].reg);
75 }
76 #else
setup_qos(void)77 static void setup_qos(void)
78 {
79 }
80 #endif
81
board_init_f(ulong dummy)82 void board_init_f(ulong dummy)
83 {
84 struct udevice *dev;
85 int ret;
86
87 #if defined(CONFIG_CPU_V7R)
88 setup_k3_mpu_regions();
89 #endif
90
91 /*
92 * Cannot delay this further as there is a chance that
93 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
94 */
95 store_boot_info_from_rom();
96
97 ctrl_mmr_unlock();
98
99 /* Init DM early */
100 spl_early_init();
101
102 /*
103 * Process pinctrl for the serial0 and serial3, aka WKUP_UART0 and
104 * MAIN_UART1 modules and continue regardless of the result of pinctrl.
105 * Do this without probing the device, but instead by searching the
106 * device that would request the given sequence number if probed. The
107 * UARTs will be used by the DM firmware and TIFS firmware images
108 * respectively and the firmware depend on SPL to initialize the pin
109 * settings.
110 */
111 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 0, &dev);
112 if (!ret)
113 pinctrl_select_state(dev, "default");
114
115 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
116 if (!ret)
117 pinctrl_select_state(dev, "default");
118
119 #ifdef CONFIG_K3_EARLY_CONS
120 /*
121 * Allow establishing an early console as required for example when
122 * doing a UART-based boot. Note that this console may not "survive"
123 * through a SYSFW PM-init step and will need a re-init in some way
124 * due to changing module clock frequencies.
125 */
126 early_console_init();
127 #endif
128
129 #if defined(CONFIG_K3_LOAD_SYSFW)
130 /*
131 * Configure and start up system controller firmware. Provide
132 * the U-Boot console init function to the SYSFW post-PM configuration
133 * callback hook, effectively switching on (or over) the console
134 * output.
135 */
136 ret = is_rom_loaded_sysfw(&bootdata);
137 if (!ret)
138 panic("ROM has not loaded TIFS firmware\n");
139
140 k3_sysfw_loader(true, NULL, NULL);
141 #endif
142
143 #if defined(CONFIG_CPU_V7R)
144 /*
145 * Relocate boot information to OCRAM (after TIFS has opend this
146 * region for us) so the next bootloader stages can keep access to
147 * primary vs backup bootmodes.
148 */
149 writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
150 #endif
151
152 /*
153 * Force probe of clk_k3 driver here to ensure basic default clock
154 * configuration is always done.
155 */
156 if (IS_ENABLED(CONFIG_SPL_CLK_K3)) {
157 ret = uclass_get_device_by_driver(UCLASS_CLK,
158 DM_DRIVER_GET(ti_clk),
159 &dev);
160 if (ret)
161 printf("Failed to initialize clk-k3!\n");
162 }
163
164 preloader_console_init();
165
166 /* Output System Firmware version info */
167 k3_sysfw_print_ver();
168
169 #if defined(CONFIG_K3_AM62A_DDRSS)
170 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
171 if (ret)
172 panic("DRAM init failed: %d\n", ret);
173 #endif
174
175 setup_qos();
176
177 printf("am62a_init: %s done\n", __func__);
178 }
179
__get_backup_bootmedia(u32 devstat)180 static u32 __get_backup_bootmedia(u32 devstat)
181 {
182 u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
183 MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
184 u32 bkup_bootmode_cfg =
185 (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
186 MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
187
188 switch (bkup_bootmode) {
189 case BACKUP_BOOT_DEVICE_UART:
190 return BOOT_DEVICE_UART;
191
192 case BACKUP_BOOT_DEVICE_USB:
193 return BOOT_DEVICE_USB;
194
195 case BACKUP_BOOT_DEVICE_ETHERNET:
196 return BOOT_DEVICE_ETHERNET;
197
198 case BACKUP_BOOT_DEVICE_MMC:
199 if (bkup_bootmode_cfg)
200 return BOOT_DEVICE_MMC2;
201 return BOOT_DEVICE_MMC1;
202
203 case BACKUP_BOOT_DEVICE_SPI:
204 return BOOT_DEVICE_SPI;
205
206 case BACKUP_BOOT_DEVICE_I2C:
207 return BOOT_DEVICE_I2C;
208
209 case BACKUP_BOOT_DEVICE_DFU:
210 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
211 return BOOT_DEVICE_USB;
212 return BOOT_DEVICE_DFU;
213 };
214
215 return BOOT_DEVICE_RAM;
216 }
217
__get_primary_bootmedia(u32 devstat)218 static u32 __get_primary_bootmedia(u32 devstat)
219 {
220 u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
221 MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
222 u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
223 MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
224
225 switch (bootmode) {
226 case BOOT_DEVICE_OSPI:
227 fallthrough;
228 case BOOT_DEVICE_QSPI:
229 fallthrough;
230 case BOOT_DEVICE_XSPI:
231 fallthrough;
232 case BOOT_DEVICE_SPI:
233 return BOOT_DEVICE_SPI;
234
235 case BOOT_DEVICE_ETHERNET_RGMII:
236 fallthrough;
237 case BOOT_DEVICE_ETHERNET_RMII:
238 return BOOT_DEVICE_ETHERNET;
239
240 case BOOT_DEVICE_EMMC:
241 return BOOT_DEVICE_MMC1;
242
243 case BOOT_DEVICE_SPI_NAND:
244 return BOOT_DEVICE_SPINAND;
245
246 case BOOT_DEVICE_MMC:
247 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
248 MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
249 return BOOT_DEVICE_MMC2;
250 return BOOT_DEVICE_MMC1;
251
252 case BOOT_DEVICE_DFU:
253 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
254 MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
255 return BOOT_DEVICE_USB;
256 return BOOT_DEVICE_DFU;
257
258 case BOOT_DEVICE_NOBOOT:
259 return BOOT_DEVICE_RAM;
260 }
261
262 return bootmode;
263 }
264
spl_boot_device(void)265 u32 spl_boot_device(void)
266 {
267 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
268 u32 bootmedia;
269
270 if (bootindex == K3_PRIMARY_BOOTMODE)
271 bootmedia = __get_primary_bootmedia(devstat);
272 else
273 bootmedia = __get_backup_bootmedia(devstat);
274
275 printf("am62a_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n",
276 __func__, devstat, bootmedia, bootindex);
277 return bootmedia;
278 }
279