1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
4  * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
5  */
6 
7 #include <common.h>
8 #include <init.h>
9 #include <net.h>
10 #include <asm/arch/boot.h>
11 #include <asm/arch/eth.h>
12 #include <asm/arch/gx.h>
13 #include <asm/arch/mem.h>
14 #include <asm/arch/meson-vpu.h>
15 #include <asm/global_data.h>
16 #include <asm/io.h>
17 #include <asm/armv8/mmu.h>
18 #include <linux/sizes.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
meson_get_boot_device(void)22 int meson_get_boot_device(void)
23 {
24 	return readl(GX_AO_SEC_GP_CFG0) & GX_AO_BOOT_DEVICE;
25 }
26 
27 /* Configure the reserved memory zones exported by the secure registers
28  * into EFI and DTB reserved memory entries.
29  */
meson_init_reserved_memory(void * fdt)30 void meson_init_reserved_memory(void *fdt)
31 {
32 	u64 bl31_size, bl31_start;
33 	u64 bl32_size, bl32_start;
34 	u32 reg;
35 
36 	/*
37 	 * Get ARM Trusted Firmware reserved memory zones in :
38 	 * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
39 	 * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
40 	 * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
41 	 */
42 	reg = readl(GX_AO_SEC_GP_CFG3);
43 
44 	bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK)
45 			>> GX_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
46 	bl32_size = (reg & GX_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
47 
48 	bl31_start = readl(GX_AO_SEC_GP_CFG5);
49 	bl32_start = readl(GX_AO_SEC_GP_CFG4);
50 
51 	/*
52 	 * Early Meson GX Firmware revisions did not provide the reserved
53 	 * memory zones in the registers, keep fixed memory zone handling.
54 	 */
55 	if (IS_ENABLED(CONFIG_MESON_GX) &&
56 	    !reg && !bl31_start && !bl32_start) {
57 		bl31_start = 0x10000000;
58 		bl31_size = 0x200000;
59 	}
60 
61 	/* Add first 16MiB reserved zone */
62 	meson_board_add_reserved_memory(fdt, 0, GX_FIRMWARE_MEM_SIZE);
63 
64 	/* Add BL31 reserved zone */
65 	if (bl31_start && bl31_size)
66 		meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
67 
68 	/* Add BL32 reserved zone */
69 	if (bl32_start && bl32_size)
70 		meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
71 
72 #if defined(CONFIG_VIDEO_MESON)
73 	meson_vpu_rsv_fb(fdt);
74 #endif
75 }
76 
get_effective_memsize(void)77 phys_size_t get_effective_memsize(void)
78 {
79 	/* Size is reported in MiB, convert it in bytes */
80 	return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK)
81 			>> GX_AO_MEM_SIZE_SHIFT) * SZ_1M;
82 }
83 
84 static struct mm_region gx_mem_map[] = {
85 	{
86 		.virt = 0x0UL,
87 		.phys = 0x0UL,
88 		.size = 0xc0000000UL,
89 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
90 			 PTE_BLOCK_INNER_SHARE
91 	}, {
92 		.virt = 0xc0000000UL,
93 		.phys = 0xc0000000UL,
94 		.size = 0x30000000UL,
95 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
96 			 PTE_BLOCK_NON_SHARE |
97 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
98 	}, {
99 		/* List terminator */
100 		0,
101 	}
102 };
103 
104 struct mm_region *mem_map = gx_mem_map;
105