1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
4  */
5 
6 #include <common.h>
7 #include <cpu_func.h>
8 #include <dm.h>
9 #include <fdtdec.h>
10 #include <hang.h>
11 #include <image.h>
12 #include <init.h>
13 #include <log.h>
14 #include <spl.h>
15 #include <asm/global_data.h>
16 #include <asm/io.h>
17 #include <asm/arch/cpu.h>
18 #include <asm/arch/soc.h>
19 
20 #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC) || \
21 	defined(CONFIG_SPL_SATA)
22 
23 /*
24  * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
25  * point to the offset of kwbimage main header which is always at offset zero
26  * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
27  * makes U-Boot non-bootable.
28  */
29 #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
30 #if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
31 #error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
32 #endif
33 #endif
34 
35 /*
36  * When loading U-Boot via SPL from eMMC, the kwbimage main header is stored at
37  * sector 0 and either on HW boot partition or on data partition. Choice of HW
38  * partition depends on what is configured in eMMC EXT_CSC register.
39  * When loading U-Boot via SPL from SD card, the kwbimage main header is stored
40  * at sector 1.
41  * Therefore MBR/GPT partition booting, fixed sector number and fixed eMMC HW
42  * partition number are unsupported due to limitation of Marvell BootROM.
43  * Correct sector number must be determined as runtime in mvebu SPL code based
44  * on the detected boot source. Otherwise U-Boot SPL would not be able to load
45  * U-Boot proper.
46  * Runtime mvebu SPL sector calculation code expects:
47  * - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0
48  * - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0
49  */
50 #ifdef CONFIG_SPL_MMC
51 #ifdef CONFIG_SYS_MMCSD_FS_BOOT
52 #error CONFIG_SYS_MMCSD_FS_BOOT is unsupported
53 #endif
54 #ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
55 #error CONFIG_SYS_MMCSD_FS_BOOT_PARTITION is unsupported
56 #endif
57 #ifdef CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG
58 #error CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG is unsupported
59 #endif
60 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
61 #error CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION is unsupported
62 #endif
63 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
64 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
65 #endif
66 #ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
67 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR must be enabled for SD/eMMC boot support
68 #endif
69 #if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) || \
70     CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
71 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
72 #endif
73 #if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) || \
74     CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
75 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
76 #endif
77 #endif
78 
79 /*
80  * When loading U-Boot via SPL from SATA disk, the kwbimage main header is
81  * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
82  * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
83  */
84 #ifdef CONFIG_SPL_SATA
85 #if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || \
86     !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
87 #error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
88 #endif
89 #endif
90 
91 /* Boot Type - block ID */
92 #define IBR_HDR_I2C_ID			0x4D
93 #define IBR_HDR_SPI_ID			0x5A
94 #define IBR_HDR_NAND_ID			0x8B
95 #define IBR_HDR_SATA_ID			0x78
96 #define IBR_HDR_PEX_ID			0x9C
97 #define IBR_HDR_UART_ID			0x69
98 #define IBR_HDR_SDIO_ID			0xAE
99 
100 /* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
101 struct kwbimage_main_hdr_v1 {
102 	u8  blockid;               /* 0x0       */
103 	u8  flags;                 /* 0x1       */
104 	u16 nandpagesize;          /* 0x2-0x3   */
105 	u32 blocksize;             /* 0x4-0x7   */
106 	u8  version;               /* 0x8       */
107 	u8  headersz_msb;          /* 0x9       */
108 	u16 headersz_lsb;          /* 0xA-0xB   */
109 	u32 srcaddr;               /* 0xC-0xF   */
110 	u32 destaddr;              /* 0x10-0x13 */
111 	u32 execaddr;              /* 0x14-0x17 */
112 	u8  options;               /* 0x18      */
113 	u8  nandblocksize;         /* 0x19      */
114 	u8  nandbadblklocation;    /* 0x1A      */
115 	u8  reserved4;             /* 0x1B      */
116 	u16 reserved5;             /* 0x1C-0x1D */
117 	u8  ext;                   /* 0x1E      */
118 	u8  checksum;              /* 0x1F      */
119 } __packed;
120 
121 #ifdef CONFIG_SPL_MMC
spl_mmc_boot_mode(struct mmc * mmc,const u32 boot_device)122 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
123 {
124 	return IS_SD(mmc) ? MMCSD_MODE_RAW : MMCSD_MODE_EMMCBOOT;
125 }
spl_mmc_get_uboot_raw_sector(struct mmc * mmc,unsigned long raw_sect)126 unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc,
127 					   unsigned long raw_sect)
128 {
129 	return IS_SD(mmc) ? 1 : 0;
130 }
131 #endif
132 
checksum32(void * start,u32 len)133 static u32 checksum32(void *start, u32 len)
134 {
135 	u32 csum = 0;
136 	u32 *p = start;
137 
138 	while (len > 0) {
139 		csum += *p++;
140 		len -= sizeof(u32);
141 	};
142 
143 	return csum;
144 }
145 
spl_check_board_image(struct spl_image_info * spl_image,const struct spl_boot_device * bootdev)146 int spl_check_board_image(struct spl_image_info *spl_image,
147 			  const struct spl_boot_device *bootdev)
148 {
149 	u32 csum = *(u32 *)(spl_image->load_addr + spl_image->size - 4);
150 
151 	if (checksum32((void *)spl_image->load_addr,
152 		       spl_image->size - 4) != csum) {
153 		printf("ERROR: Invalid data checksum in kwbimage\n");
154 		return -EINVAL;
155 	}
156 
157 	return 0;
158 }
159 
spl_parse_board_header(struct spl_image_info * spl_image,const struct spl_boot_device * bootdev,const void * image_header,size_t size)160 int spl_parse_board_header(struct spl_image_info *spl_image,
161 			   const struct spl_boot_device *bootdev,
162 			   const void *image_header, size_t size)
163 {
164 	const struct kwbimage_main_hdr_v1 *mhdr = image_header;
165 
166 	if (size < sizeof(*mhdr)) {
167 		/* This should be compile time assert */
168 		printf("FATAL ERROR: Image header size is too small\n");
169 		hang();
170 	}
171 
172 	/*
173 	 * Very basic check for image validity. We cannot check mhdr->checksum
174 	 * as it is calculated also from variable length extended headers
175 	 * (including SPL content) which is not included in U-Boot image_header.
176 	 */
177 	if (mhdr->version != 1 ||
178 	    ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr)) {
179 		printf("ERROR: Invalid kwbimage v1\n");
180 		return -EINVAL;
181 	}
182 
183 	if (IS_ENABLED(CONFIG_SPL_SPI_FLASH_SUPPORT) &&
184 	    bootdev->boot_device == BOOT_DEVICE_SPI &&
185 	    mhdr->blockid != IBR_HDR_SPI_ID) {
186 		printf("ERROR: Wrong blockid (0x%x) in SPI kwbimage\n",
187 		       mhdr->blockid);
188 		return -EINVAL;
189 	}
190 
191 	if (IS_ENABLED(CONFIG_SPL_SATA) &&
192 	    bootdev->boot_device == BOOT_DEVICE_SATA &&
193 	    mhdr->blockid != IBR_HDR_SATA_ID) {
194 		printf("ERROR: Wrong blockid (0x%x) in SATA kwbimage\n",
195 		       mhdr->blockid);
196 		return -EINVAL;
197 	}
198 
199 	if (IS_ENABLED(CONFIG_SPL_MMC) &&
200 	    (bootdev->boot_device == BOOT_DEVICE_MMC1) &&
201 	    mhdr->blockid != IBR_HDR_SDIO_ID) {
202 		printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n",
203 		       mhdr->blockid);
204 		return -EINVAL;
205 	}
206 
207 	spl_image->offset = mhdr->srcaddr;
208 
209 	/*
210 	 * For SATA srcaddr is specified in number of sectors.
211 	 * Retrieve block size of the first SCSI device (same
212 	 * code used by the spl_sata_load_image_raw() function)
213 	 * or fallback to default sector size of 512 bytes.
214 	 */
215 	if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) {
216 		struct blk_desc *blk_dev = blk_get_devnum_by_uclass_id(UCLASS_SCSI, 0);
217 		unsigned long blksz = blk_dev ? blk_dev->blksz : 512;
218 		spl_image->offset *= blksz;
219 	}
220 
221 	if (spl_image->offset % 4 != 0) {
222 		printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
223 		       spl_image->offset);
224 		return -EINVAL;
225 	}
226 
227 	if (mhdr->blocksize <= 4 || mhdr->blocksize % 4 != 0) {
228 		printf("ERROR: Wrong blocksize (0x%08x) in kwbimage\n",
229 		       mhdr->blocksize);
230 		return -EINVAL;
231 	}
232 
233 	spl_image->size = mhdr->blocksize;
234 	spl_image->entry_point = mhdr->execaddr;
235 	spl_image->load_addr = mhdr->destaddr;
236 	spl_image->os = IH_OS_U_BOOT;
237 	spl_image->name = "U-Boot";
238 
239 	return 0;
240 }
241 
spl_boot_device(void)242 u32 spl_boot_device(void)
243 {
244 	u32 boot_device = get_boot_device();
245 
246 	switch (boot_device) {
247 	/*
248 	 * Return to the BootROM to continue the Marvell xmodem
249 	 * UART boot protocol. As initiated by the kwboot tool.
250 	 *
251 	 * This can only be done by the BootROM since the beginning
252 	 * of the image is already read and interpreted by the BootROM.
253 	 * SPL has no chance to receive this information. So we
254 	 * need to return to the BootROM to enable this xmodem
255 	 * UART download. Use SPL infrastructure to return to BootROM.
256 	 */
257 	case BOOT_DEVICE_UART:
258 		return BOOT_DEVICE_BOOTROM;
259 
260 	/*
261 	 * If SPL is compiled with chosen boot_device support
262 	 * then use SPL driver for loading U-Boot proper.
263 	 */
264 #ifdef CONFIG_SPL_MMC
265 	case BOOT_DEVICE_MMC1:
266 		return BOOT_DEVICE_MMC1;
267 #endif
268 #ifdef CONFIG_SPL_SATA
269 	case BOOT_DEVICE_SATA:
270 		return BOOT_DEVICE_SATA;
271 #endif
272 #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
273 	case BOOT_DEVICE_SPI:
274 		return BOOT_DEVICE_SPI;
275 #endif
276 
277 	/*
278 	 * If SPL is not compiled with chosen boot_device support
279 	 * then return to the BootROM. BootROM supports loading
280 	 * U-Boot proper from any valid boot_device present in SAR
281 	 * register.
282 	 */
283 	default:
284 		return BOOT_DEVICE_BOOTROM;
285 	}
286 }
287 
board_boot_order(u32 * spl_boot_list)288 void board_boot_order(u32 *spl_boot_list)
289 {
290 	spl_boot_list[0] = spl_boot_device();
291 	if (spl_boot_list[0] != BOOT_DEVICE_BOOTROM)
292 		spl_boot_list[1] = BOOT_DEVICE_BOOTROM;
293 }
294 
295 #else
296 
spl_boot_device(void)297 u32 spl_boot_device(void)
298 {
299 	return BOOT_DEVICE_BOOTROM;
300 }
301 
302 #endif
303 
board_return_to_bootrom(struct spl_image_info * spl_image,struct spl_boot_device * bootdev)304 int board_return_to_bootrom(struct spl_image_info *spl_image,
305 			    struct spl_boot_device *bootdev)
306 {
307 	u32 *regs = *(u32 **)(CONFIG_SPL_STACK + 4);
308 
309 	printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
310 	return_to_bootrom();
311 
312 	/* NOTREACHED - return_to_bootrom() does not return */
313 	hang();
314 }
315 
board_init_f(ulong dummy)316 void board_init_f(ulong dummy)
317 {
318 	int ret;
319 
320 	/*
321 	 * Pin muxing needs to be done before UART output, since
322 	 * on A38x the UART pins need some re-muxing for output
323 	 * to work.
324 	 */
325 	board_early_init_f();
326 
327 	/*
328 	 * Use special translation offset for SPL. This needs to be
329 	 * configured *before* spl_init() is called as this function
330 	 * calls dm_init() which calls the bind functions of the
331 	 * device drivers. Here the base address needs to be configured
332 	 * (translated) correctly.
333 	 */
334 	gd->translation_offset = 0xd0000000 - 0xf1000000;
335 
336 	ret = spl_init();
337 	if (ret) {
338 		printf("spl_init() failed: %d\n", ret);
339 		hang();
340 	}
341 
342 	preloader_console_init();
343 
344 	/* Armada 375 does not support SerDes and DDR3 init yet */
345 #if !defined(CONFIG_ARMADA_375)
346 	/* First init the serdes PHY's */
347 	serdes_phy_config();
348 
349 	/* Setup DDR */
350 	ret = ddr3_init();
351 	if (ret) {
352 		printf("ddr3_init() failed: %d\n", ret);
353 		if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
354 		    get_boot_device() != BOOT_DEVICE_UART)
355 			reset_cpu();
356 		else
357 			hang();
358 	}
359 #endif
360 
361 	/* Initialize Auto Voltage Scaling */
362 	mv_avs_init();
363 
364 	/* Update read timing control for PCIe */
365 	mv_rtc_config();
366 }
367