1if ARCH_ZYNQMP 2 3config SPL_FS_FAT 4 default y 5 6config SPL_LIBCOMMON_SUPPORT 7 default y 8 9config SPL_LIBDISK_SUPPORT 10 default y 11 12config SPL_LIBGENERIC_SUPPORT 13 default y 14 15config SPL_MMC 16 default y if MMC_SDHCI_ZYNQ 17 18config SPL_SERIAL 19 default y 20 21config SPL_SPI_FLASH_SUPPORT 22 default y if ZYNQ_QSPI 23 24config SPL_SPI 25 default y if ZYNQ_QSPI 26 27config SYS_BOARD 28 string "Board name" 29 default "zynqmp" 30 31config SYS_VENDOR 32 string "Vendor name" 33 default "xilinx" 34 35config SYS_SOC 36 default "zynqmp" 37 38config SYS_CONFIG_NAME 39 string "Board configuration name" 40 default "xilinx_zynqmp" 41 help 42 This option contains information about board configuration name. 43 Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header 44 will be used for board configuration. 45 46config SYS_MEM_RSVD_FOR_MMU 47 bool "Reserve memory for MMU Table" 48 help 49 If defined this option is used to setup different space for 50 MMU table than the one which will be allocated during 51 relocation. 52 53config BOOT_INIT_FILE 54 string "boot.bin init register filename" 55 depends on SPL 56 default "" 57 help 58 Add register writes to boot.bin format (max 256 pairs). 59 Expect a table of register-value pairs, e.g. "0x12345678 0x4321" 60 61config PMUFW_INIT_FILE 62 string "PMU firmware" 63 depends on SPL 64 default "" 65 help 66 Include external PMUFW (Platform Management Unit FirmWare) to 67 a Xilinx bootable image (boot.bin). 68 69config ZYNQMP_SPL_PM_CFG_OBJ_FILE 70 string "PMU firmware configuration object to load at runtime by SPL" 71 depends on SPL 72 help 73 Path to a binary PMU firmware configuration object to be linked 74 into U-Boot SPL and loaded at runtime into the PMU firmware. 75 76 The ZynqMP Power Management Unit (PMU) needs a configuration 77 object for most SoC peripherals to work. To have it loaded by 78 U-Boot SPL set here the file name (absolute path or relative to 79 the top source tree) of your configuration, which must be a 80 binary blob. It will be linked in the SPL binary and loaded 81 into the PMU firmware by U-Boot SPL during board 82 initialization. 83 84 Leave this option empty if your PMU firmware has a hard-coded 85 configuration object or you are loading it by any other means. 86 87config ZYNQMP_USB 88 bool "Configure ZynqMP USB" 89 90config ZYNQMP_NO_DDR 91 bool "Disable DDR MMU mapping" 92 help 93 This option configures MMU with no DDR to avoid speculative 94 access to DDR memory where DDR is not present. 95 96config SPL_ZYNQMP_DRAM_ECC_INIT 97 bool "Initialize DRAM ECC" 98 depends on SPL 99 help 100 This option initializes all memory to 0xdeadbeef. Must be set if your 101 memory is of ECC type. 102 103config SPL_ZYNQMP_DRAM_BANK1_BASE 104 depends on SPL_ZYNQMP_DRAM_ECC_INIT 105 hex "DRAM Bank1 address" 106 default 0x00000000 107 help 108 Start address of DRAM ECC bank1 109 110config SPL_ZYNQMP_DRAM_BANK1_LEN 111 depends on SPL_ZYNQMP_DRAM_ECC_INIT 112 hex "DRAM Bank1 size" 113 default 0x80000000 114 help 115 Size in bytes of the DRAM ECC bank1 116 117config SPL_ZYNQMP_DRAM_BANK2_BASE 118 depends on SPL_ZYNQMP_DRAM_ECC_INIT 119 hex "DRAM Bank2 address" 120 default 0x800000000 121 help 122 Start address of DRAM ECC bank2 123 124config SPL_ZYNQMP_DRAM_BANK2_LEN 125 depends on SPL_ZYNQMP_DRAM_ECC_INIT 126 hex "DRAM Bank2 size" 127 default 0x0 128 help 129 Size in bytes of the DRAM ECC bank2. A null size takes no action. 130 131config SYS_MALLOC_F_LEN 132 default 0x600 133 134config DEFINE_TCM_OCM_MMAP 135 bool "Define TCM and OCM memory in MMU Table" 136 default y if MP 137 help 138 This option if enabled defines the TCM and OCM memory and its 139 memory attributes in MMU table entry. 140 141config ZYNQMP_PSU_INIT_ENABLED 142 bool "Include psu_init" 143 select BOARD_EARLY_INIT_F 144 help 145 Include psu_init to full u-boot. 146 147config SPL_ZYNQMP_PSU_INIT_ENABLED 148 bool "Include psu_init in SPL" 149 default y if SPL 150 select BOARD_EARLY_INIT_F 151 help 152 Include psu_init by default in SPL. 153 154config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED 155 bool "Overwrite SPL bootmode" 156 depends on SPL 157 help 158 Overwrite bootmode selected via boot mode pins to tell SPL what should 159 be the next boot device. 160 161config SPL_ZYNQMP_RESTORE_JTAG 162 bool "Restore JTAG" 163 depends on SPL 164 help 165 Booting SPL in secure mode causes the CSU to disable the JTAG interface 166 even if no eFuses were burnt. This option restores the interface if 167 possible. 168 169config ZYNQ_SDHCI_MAX_FREQ 170 default 200000000 171 172config SPL_ZYNQMP_ALT_BOOTMODE 173 hex 174 default 0x0 if JTAG_MODE 175 default 0x1 if QSPI_MODE_24BIT 176 default 0x2 if QSPI_MODE_32BIT 177 default 0x3 if SD_MODE 178 default 0x4 if NAND_MODE 179 default 0x5 if SD_MODE1 180 default 0x6 if EMMC_MODE 181 default 0x7 if USB_MODE 182 default 0xa if SW_USBHOST_MODE 183 default 0xb if SW_SATA_MODE 184 default 0xe if SD1_LSHFT_MODE 185 186choice 187 prompt "Boot mode" 188 depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED 189 default JTAG_MODE 190 191config JTAG_MODE 192 bool "JTAG_MODE" 193 194config QSPI_MODE_24BIT 195 bool "QSPI_MODE_24BIT" 196 197config QSPI_MODE_32BIT 198 bool "QSPI_MODE_32BIT" 199 200config SD_MODE 201 bool "SD_MODE" 202 203config SD_MODE1 204 bool "SD_MODE1" 205 206config NAND_MODE 207 bool "NAND_MODE" 208 209config EMMC_MODE 210 bool "EMMC_MODE" 211 212config USB_MODE 213 bool "USB" 214 215config SW_USBHOST_MODE 216 bool "SW USBHOST_MODE" 217 218config SW_SATA_MODE 219 bool "SW SATA_MODE" 220 221config SD1_LSHFT_MODE 222 bool "SD1_LSHFT_MODE" 223 224endchoice 225 226source "board/xilinx/Kconfig" 227source "board/xilinx/zynqmp/Kconfig" 228 229endif 230