1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
4 */
5
6/ {
7	compatible = "fsl,mcf5441x";
8
9	aliases {
10		serial0 = &uart0;
11		spi0 = &dspi0;
12		fec0 = &fec0;
13		fec1 = &fec1;
14	};
15
16	soc {
17		compatible = "simple-bus";
18		#address-cells = <1>;
19		#size-cells = <1>;
20
21		uart0: uart@fc060000 {
22			compatible = "fsl,mcf-uart";
23			reg = <0xfc060000 0x40>;
24			status = "disabled";
25		};
26
27		uart1: uart@fc064000 {
28			compatible = "fsl,mcf-uart";
29			reg = <0xfc064000 0x40>;
30			status = "disabled";
31		};
32
33		uart2: uart@fc068000 {
34			compatible = "fsl,mcf-uart";
35			reg = <0xfc068000 0x40>;
36			status = "disabled";
37		};
38
39		uart3: uart@fc06c000 {
40			compatible = "fsl,mcf-uart";
41			reg = <0xfc06c000 0x40>;
42			status = "disabled";
43		};
44
45		dspi0: dspi@fc05c000 {
46			compatible = "fsl,mcf-dspi";
47			#address-cells = <1>;
48			#size-cells = <0>;
49			reg = <0xfc05c000 0x100>;
50			spi-max-frequency = <50000000>;
51			num-cs = <4>;
52			spi-mode = <0>;
53			status = "disabled";
54		};
55
56		dspi1: dspi@fc03c000 {
57			compatible = "fsl,mcf-dspi";
58			#address-cells = <1>;
59			#size-cells = <0>;
60			reg = <0xfc03c000 0x100>;
61			spi-max-frequency = <50000000>;
62			num-cs = <4>;
63			spi-mode = <0>;
64			status = "disabled";
65		};
66
67		dspi2: dspi@ec038000 {
68			compatible = "fsl,mcf-dspi";
69			#address-cells = <1>;
70			#size-cells = <0>;
71			reg = <0xec038000 0x100>;
72			spi-max-frequency = <50000000>;
73			num-cs = <4>;
74			spi-mode = <0>;
75			status = "disabled";
76		};
77
78		dspi3: dspi@ec03c000 {
79			compatible = "fsl,mcf-dspi";
80			#address-cells = <1>;
81			#size-cells = <0>;
82			reg = <0xec03c00 0x100>;
83			spi-max-frequency = <50000000>;
84			num-cs = <4>;
85			spi-mode = <0>;
86			status = "disabled";
87		};
88
89		fec0: ethernet@fc0d4000 {
90			compatible = "fsl,mcf-fec";
91			reg = <0xfc0d4000 0x4000>;
92			mii-base = <0>;
93			max-speed = <100>;
94			timeout-loop = <50000>;
95			status = "disabled";
96		};
97
98		fec1: ethernet@fc0d8000 {
99			compatible = "fsl,mcf-fec";
100			reg = <0xfc0d8000 0x4000>;
101			mii-base = <1>;
102			max-speed = <100>;
103			timeout-loop = <50000>;
104			status = "disabled";
105		};
106
107		i2c0: i2c@0xfc058000 {
108			compatible = "fsl-i2c";
109			#address-cells=<1>;
110			#size-cells=<0>;
111			cell-index = <0>;
112			reg = <0xfc058000 0x100>;
113			clock-frequency = <100000>;
114			status = "disabled";
115		};
116
117		i2c1: i2c@0xfc038000 {
118			compatible = "fsl-i2c";
119			#address-cells=<1>;
120			#size-cells=<0>;
121			cell-index = <1>;
122			reg = <0xfc038000 0x100>;
123			clock-frequency = <100000>;
124			status = "disabled";
125		};
126
127		i2c2: i2c@0xfc010000 {
128			compatible = "fsl-i2c";
129			#address-cells=<1>;
130			#size-cells=<0>;
131			cell-index = <2>;
132			reg = <0xfc010000 0x100>;
133			clock-frequency = <100000>;
134			status = "disabled";
135		};
136
137		i2c3: i2c@0xfc014000 {
138			compatible = "fsl-i2c";
139			#address-cells=<1>;
140			#size-cells=<0>;
141			cell-index = <3>;
142			reg = <0xfc014000 0x100>;
143			clock-frequency = <100000>;
144			status = "disabled";
145		};
146
147		i2c4: i2c@0xfc018000 {
148			compatible = "fsl-i2c";
149			#address-cells=<1>;
150			#size-cells=<0>;
151			cell-index = <4>;
152			reg = <0xfc018000 0x100>;
153			clock-frequency = <100000>;
154			status = "disabled";
155		};
156
157		i2c5: i2c@0xfc01c000 {
158			compatible = "fsl-i2c";
159			#address-cells=<1>;
160			#size-cells=<0>;
161			cell-index = <5>;
162			reg = <0xfc01c000 0x100>;
163			clock-frequency = <100000>;
164			status = "disabled";
165		};
166	};
167};
168