1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002-2010 4 * Copyright 2020 NXP 5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6 */ 7 8 #ifndef __ASM_GBL_DATA_H 9 #define __ASM_GBL_DATA_H 10 11 #include <config.h> 12 #include "asm/types.h" 13 14 /* Architecture-specific global data */ 15 struct arch_global_data { 16 #if defined(CONFIG_FSL_ESDHC) 17 u32 sdhc_clk; 18 u32 sdhc_per_clk; 19 #endif 20 #if defined(CONFIG_MPC8xx) 21 unsigned long brg_clk; 22 #endif 23 /* TODO: sjg@chromium.org: Should these be unslgned long? */ 24 #if defined(CONFIG_MPC83xx) 25 #ifdef CONFIG_CLK_MPC83XX 26 u32 core_clk; 27 #else 28 /* There are other clocks in the MPC83XX */ 29 u32 csb_clk; 30 # if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ 31 defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) 32 u32 tsec1_clk; 33 u32 tsec2_clk; 34 u32 usbdr_clk; 35 # endif 36 # if defined(CONFIG_ARCH_MPC834X) 37 u32 usbmph_clk; 38 # endif /* CONFIG_ARCH_MPC834X */ 39 u32 core_clk; 40 u32 enc_clk; 41 u32 lbiu_clk; 42 u32 lclk_clk; 43 # if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \ 44 defined(CONFIG_ARCH_MPC837X) 45 u32 pciexp1_clk; 46 u32 pciexp2_clk; 47 # endif 48 # if defined(CONFIG_ARCH_MPC837X) 49 u32 sata_clk; 50 # endif 51 # if defined(CONFIG_ARCH_MPC8360) 52 u32 mem_sec_clk; 53 # endif /* CONFIG_ARCH_MPC8360 */ 54 #endif 55 #endif 56 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 57 u32 lbc_clk; 58 void *cpu; 59 #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 60 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ 61 defined(CONFIG_MPC86xx) 62 u32 i2c1_clk; 63 u32 i2c2_clk; 64 #endif 65 #if defined(CONFIG_QE) 66 u32 qe_clk; 67 u32 brg_clk; 68 uint mp_alloc_base; 69 uint mp_alloc_top; 70 #endif /* CONFIG_QE */ 71 #if defined(CONFIG_FSL_LAW) 72 u32 used_laws; 73 #endif 74 #if defined(CONFIG_E500) 75 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 76 #endif 77 unsigned long reset_status; /* reset status register at boot */ 78 #if defined(CONFIG_MPC83xx) 79 unsigned long arbiter_event_attributes; 80 unsigned long arbiter_event_address; 81 #endif 82 #ifdef CONFIG_SYS_FPGA_COUNT 83 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 84 #endif 85 #if defined(CONFIG_WD_MAX_RATE) 86 unsigned long long wdt_last; /* trace watch-dog triggering rate */ 87 #endif 88 #if defined(CONFIG_LWMON5) 89 unsigned long kbd_status; 90 #endif 91 }; 92 93 #include <asm-generic/global_data.h> 94 95 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 96 97 #endif /* __ASM_GBL_DATA_H */ 98