1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Devicetree file for running sandbox tests
4 *
5 * This includes lots of extra devices used by various tests.
6 *
7 * Note that SPL use the main sandbox.dts file
8 */
9
10/dts-v1/;
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/gpio/sandbox-gpio.h>
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/pinctrl/sandbox-pinmux.h>
16#include <dt-bindings/mux/mux.h>
17
18/ {
19	model = "sandbox";
20	compatible = "sandbox";
21	#address-cells = <1>;
22	#size-cells = <1>;
23
24	aliases {
25		console = &uart0;
26		ethernet0 = "/eth@10002000";
27		ethernet2 = &swp_0;
28		ethernet3 = &eth_3;
29		ethernet4 = &dsa_eth0;
30		ethernet5 = &eth_5;
31		ethernet6 = "/eth@10004000";
32		ethernet7 = &swp_1;
33		ethernet8 = &phy_eth0;
34		gpio1 = &gpio_a;
35		gpio2 = &gpio_b;
36		gpio3 = &gpio_c;
37		i2c0 = "/i2c@0";
38		mmc0 = "/mmc0";
39		mmc1 = "/mmc1";
40		mmc2 = "/mmc2";
41		mmc3 = "/mmc3";
42		pci0 = &pci0;
43		pci1 = &pci1;
44		pci2 = &pci2;
45		remoteproc0 = &rproc_1;
46		remoteproc1 = &rproc_2;
47		rtc0 = &rtc_0;
48		rtc1 = &rtc_1;
49		spi0 = "/spi@0";
50		testfdt6 = "/e-test";
51		testbus3 = "/some-bus";
52		testfdt0 = "/some-bus/c-test@0";
53		testfdt12 = "/some-bus/c-test@1";
54		testfdt3 = "/b-test";
55		testfdt5 = "/some-bus/c-test@5";
56		testfdt8 = "/a-test";
57		testfdtm1 = &testfdtm1;
58		fdt-dummy0 = "/translation-test@8000/dev@0,0";
59		fdt-dummy1 = "/translation-test@8000/dev@1,100";
60		fdt-dummy2 = "/translation-test@8000/dev@2,200";
61		fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
62		usb0 = &usb_0;
63		usb1 = &usb_1;
64		usb2 = &usb_2;
65		axi0 = &axi;
66		osd0 = "/osd";
67	};
68
69	binman: binman {
70	};
71
72	config {
73		testing-bool;
74		testing-int = <123>;
75		testing-str = "testing";
76		environment {
77			from_fdt = "yes";
78			fdt_env_path = "";
79		};
80	};
81
82	bootstd {
83		bootph-verify;
84		compatible = "u-boot,boot-std";
85
86		filename-prefixes = "/", "/boot/";
87		bootdev-order = "mmc2", "mmc1";
88
89		extlinux {
90			compatible = "u-boot,extlinux";
91		};
92
93		efi {
94			compatible = "u-boot,distro-efi";
95		};
96
97		theme {
98			font-size = <30>;
99		};
100
101		/*
102		 * This is used for the VBE OS-request tests. A FAT filesystem
103		 * created in a partition with the VBE information appearing
104		 * before the parititon starts
105		 */
106		firmware0 {
107			bootph-verify;
108			compatible = "fwupd,vbe-simple";
109			storage = "mmc1";
110			skip-offset = <0x200>;
111			area-start = <0x400>;
112			area-size = <0x1000>;
113			state-offset = <0x400>;
114			state-size = <0x40>;
115			version-offset = <0x800>;
116			version-size = <0x100>;
117		};
118
119		/*
120		 * This is used for the VBE VPL tests. The MMC device holds the
121		 * binman image.bin file. The test progresses through each phase
122		 * of U-Boot, loading each in turn from MMC.
123		 *
124		 * Note that the test enables this node (and mmc3) before
125		 * running U-Boot
126		 */
127		firmware1 {
128			bootph-verify;
129			status = "disabled";
130			compatible = "fwupd,vbe-simple";
131			storage = "mmc3";
132			skip-offset = <0x800000>;
133			area-start = <0>;
134			area-size = <0xe00000>;
135			state-offset = <0xdffc00>;
136			state-size = <0x40>;
137			version-offset = <0xdffe00>;
138			version-size = <0x100>;
139		};
140	};
141
142	fuzzing-engine {
143		compatible = "sandbox,fuzzing-engine";
144	};
145
146	reboot-mode0 {
147		compatible = "reboot-mode-gpio";
148		gpios = <&gpio_c 0 GPIO_ACTIVE_HIGH>, <&gpio_c 1 GPIO_ACTIVE_HIGH>;
149		u-boot,env-variable = "bootstatus";
150		mode-test = <0x01>;
151		mode-download = <0x03>;
152	};
153
154	reboot_mode1: reboot-mode@14 {
155		compatible = "reboot-mode-rtc";
156		rtc = <&rtc_0>;
157		reg = <0x30 4>;
158		u-boot,env-variable = "bootstatus";
159		big-endian;
160		mode-test = <0x21969147>;
161		mode-download = <0x51939147>;
162	};
163
164	audio: audio-codec {
165		compatible = "sandbox,audio-codec";
166		#sound-dai-cells = <1>;
167	};
168
169	buttons {
170		compatible = "gpio-keys";
171
172		btn1 {
173			gpios = <&gpio_a 3 0>;
174			label = "button1";
175			linux,code = <BTN_1>;
176		};
177
178		btn2 {
179			gpios = <&gpio_a 4 0>;
180			label = "button2";
181			linux,code = <BTN_2>;
182		};
183	};
184
185	buttons2 {
186		compatible = "adc-keys";
187		io-channels = <&adc 3>;
188		keyup-threshold-microvolt = <3000000>;
189
190		button-up {
191			label = "button3";
192			linux,code = <KEY_F3>;
193			press-threshold-microvolt = <1500000>;
194		};
195
196		button-down {
197			label = "button4";
198			linux,code = <KEY_F4>;
199			press-threshold-microvolt = <1000000>;
200		};
201
202		button-enter {
203			label = "button5";
204			linux,code = <KEY_F5>;
205			press-threshold-microvolt = <500000>;
206		};
207	};
208
209	cros_ec: cros-ec {
210		reg = <0 0>;
211		compatible = "google,cros-ec-sandbox";
212
213		/*
214		 * This describes the flash memory within the EC. Note
215		 * that the STM32L flash erases to 0, not 0xff.
216		 */
217		flash {
218			image-pos = <0x08000000>;
219			size = <0x20000>;
220			erase-value = <0>;
221
222			/* Information for sandbox */
223			ro {
224				image-pos = <0>;
225				size = <0xf000>;
226			};
227			wp-ro {
228				image-pos = <0xf000>;
229				size = <0x1000>;
230				used = <0x884>;
231				compress = "lz4";
232				uncomp-size = <0xcf8>;
233				hash {
234					algo = "sha256";
235					value = [00 01 02 03 04 05 06 07
236						08 09 0a 0b 0c 0d 0e 0f
237						10 11 12 13 14 15 16 17
238						18 19 1a 1b 1c 1d 1e 1f];
239				};
240			};
241			rw {
242				image-pos = <0x10000>;
243				size = <0x10000>;
244			};
245		};
246
247		cros_ec_pwm: cros-ec-pwm {
248			compatible = "google,cros-ec-pwm";
249			#pwm-cells = <1>;
250		};
251
252	};
253
254	dsi_host: dsi_host {
255		compatible = "sandbox,dsi-host";
256	};
257
258	a-test {
259		reg = <0 1>;
260		compatible = "denx,u-boot-fdt-test";
261		ping-expect = <0>;
262		ping-add = <0>;
263		bootph-all;
264		test-gpios = <&gpio_a 1>, <&gpio_a 4>,
265			<&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
266			<0>, <&gpio_a 12>;
267		test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
268			<&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
269			<&gpio_b 7 GPIO_IN 3 2 1>,
270			<&gpio_b 8 GPIO_OUT 3 2 1>,
271			<&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
272		test3-gpios =
273			<&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
274			<&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
275			<&gpio_c 2 GPIO_OUT>,
276			<&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
277			<&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
278			<&gpio_c 5 GPIO_IN>,
279			<&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
280			<&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
281		test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
282		test5-gpios = <&gpio_a 19>;
283
284		bool-value;
285		int8-value = /bits/ 8 <0x12>;
286		int16-value = /bits/ 16 <0x1234>;
287		int-value = <1234>;
288		uint-value = <(-1234)>;
289		int64-value = /bits/ 64 <0x1111222233334444>;
290		int-array = <5678 9123 4567>;
291		str-value = "test string";
292		interrupts-extended = <&irq 3 0>;
293		acpi,name = "GHIJ";
294		phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
295
296		mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
297			       <&muxcontroller0 2>, <&muxcontroller0 3>,
298			       <&muxcontroller1>;
299		mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
300		mux-syscon = <&syscon3>;
301		display-timings {
302			timing0: 240x320 {
303				clock-frequency = <6500000>;
304				hactive = <240>;
305				vactive = <320>;
306				hfront-porch = <6>;
307				hback-porch = <7>;
308				hsync-len = <1>;
309				vback-porch = <5>;
310				vfront-porch = <8>;
311				vsync-len = <2>;
312				hsync-active = <1>;
313				vsync-active = <0>;
314				de-active = <1>;
315				pixelclk-active = <1>;
316				interlaced;
317				doublescan;
318				doubleclk;
319			};
320			timing1: 480x800 {
321				clock-frequency = <9000000>;
322				hactive = <480>;
323				vactive = <800>;
324				hfront-porch = <10>;
325				hback-porch = <59>;
326				hsync-len = <12>;
327				vback-porch = <15>;
328				vfront-porch = <17>;
329				vsync-len = <16>;
330				hsync-active = <0>;
331				vsync-active = <1>;
332				de-active = <0>;
333				pixelclk-active = <0>;
334			};
335			timing2: 800x480 {
336				clock-frequency = <33500000>;
337				hactive = <800>;
338				vactive = <480>;
339				hback-porch = <89>;
340				hfront-porch = <164>;
341				vback-porch = <23>;
342				vfront-porch = <10>;
343				hsync-len = <11>;
344				vsync-len = <13>;
345			};
346		};
347		panel-timing {
348			clock-frequency = <6500000>;
349			hactive = <240>;
350			vactive = <320>;
351			hfront-porch = <6>;
352			hback-porch = <7>;
353			hsync-len = <1>;
354			vback-porch = <5>;
355			vfront-porch = <8>;
356			vsync-len = <2>;
357			hsync-active = <1>;
358			vsync-active = <0>;
359			de-active = <1>;
360			pixelclk-active = <1>;
361			interlaced;
362			doublescan;
363			doubleclk;
364		};
365	};
366
367	junk {
368		reg = <1 1>;
369		compatible = "not,compatible";
370	};
371
372	no-compatible {
373		reg = <2 1>;
374	};
375
376	backlight: backlight {
377		compatible = "pwm-backlight";
378		enable-gpios = <&gpio_a 1>;
379		power-supply = <&ldo_1>;
380		pwms = <&pwm 0 1000>;
381		default-brightness-level = <5>;
382		brightness-levels = <0 16 32 64 128 170 202 234 255>;
383	};
384
385	bind-test {
386		compatible = "simple-bus";
387		bind-test-child1 {
388			compatible = "sandbox,phy";
389			#phy-cells = <1>;
390		};
391
392		bind-test-child2 {
393			compatible = "simple-bus";
394		};
395	};
396
397	b-test {
398		reg = <3 1>;
399		compatible = "denx,u-boot-fdt-test";
400		ping-expect = <3>;
401		ping-add = <3>;
402
403		mux-controls = <&muxcontroller0 0>;
404		mux-control-names = "mux0";
405	};
406
407	phy_provider0: gen_phy@0 {
408		compatible = "sandbox,phy";
409		#phy-cells = <1>;
410	};
411
412	phy_provider1: gen_phy@1 {
413		compatible = "sandbox,phy";
414		#phy-cells = <0>;
415		broken;
416	};
417
418	phy_provider2: gen_phy@2 {
419		compatible = "sandbox,phy";
420		#phy-cells = <0>;
421	};
422
423	gen_phy_user: gen_phy_user {
424		compatible = "simple-bus";
425		phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
426		phy-names = "phy1", "phy2", "phy3";
427	};
428
429	gen_phy_user1: gen_phy_user1 {
430		compatible = "simple-bus";
431		phys = <&phy_provider0 0>, <&phy_provider2>;
432		phy-names = "phy1", "phy2";
433	};
434
435	some-bus {
436		#address-cells = <1>;
437		#size-cells = <0>;
438		compatible = "denx,u-boot-test-bus";
439		reg = <3 1>;
440		ping-expect = <4>;
441		ping-add = <4>;
442		c-test@5 {
443			compatible = "denx,u-boot-fdt-test";
444			reg = <5>;
445			ping-expect = <5>;
446			ping-add = <5>;
447		};
448		c-test@0 {
449			compatible = "denx,u-boot-fdt-test";
450			reg = <0>;
451			ping-expect = <6>;
452			ping-add = <6>;
453		};
454		c-test@1 {
455			compatible = "denx,u-boot-fdt-test";
456			reg = <1>;
457			ping-expect = <7>;
458			ping-add = <7>;
459		};
460	};
461
462	d-test {
463		reg = <3 1>;
464		ping-expect = <6>;
465		ping-add = <6>;
466		compatible = "google,another-fdt-test";
467	};
468
469	e-test {
470		reg = <3 1>;
471		ping-expect = <6>;
472		ping-add = <6>;
473		compatible = "google,another-fdt-test";
474	};
475
476	f-test {
477		compatible = "denx,u-boot-fdt-test";
478	};
479
480	g-test {
481		compatible = "denx,u-boot-fdt-test";
482	};
483
484	h-test {
485		compatible = "denx,u-boot-fdt-test1";
486	};
487
488	i-test {
489		compatible = "mediatek,u-boot-fdt-test";
490		#address-cells = <1>;
491		#size-cells = <0>;
492
493		subnode@0 {
494			reg = <0>;
495		};
496
497		subnode@1 {
498			reg = <1>;
499		};
500
501		subnode@2 {
502			reg = <2>;
503		};
504	};
505
506	devres-test {
507		compatible = "denx,u-boot-devres-test";
508	};
509
510	another-test {
511		reg = <0 2>;
512		compatible = "denx,u-boot-fdt-test";
513		test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
514		test5-gpios = <&gpio_a 19>;
515	};
516
517	mmio-bus@0 {
518		#address-cells = <1>;
519		#size-cells = <1>;
520		compatible = "denx,u-boot-test-bus";
521		dma-ranges = <0x10000000 0x00000000 0x00040000>;
522
523		subnode@0 {
524			compatible = "denx,u-boot-fdt-test";
525		};
526	};
527
528	mmio-bus@1 {
529		#address-cells = <1>;
530		#size-cells = <1>;
531		compatible = "denx,u-boot-test-bus";
532
533		subnode@0 {
534			compatible = "denx,u-boot-fdt-test";
535		};
536	};
537
538	acpi_test1: acpi-test {
539		compatible = "denx,u-boot-acpi-test";
540		acpi-ssdt-test-data = "ab";
541		acpi-dsdt-test-data = "hi";
542		child {
543			compatible = "denx,u-boot-acpi-test";
544		};
545	};
546
547	acpi_test2: acpi-test2 {
548		compatible = "denx,u-boot-acpi-test";
549		acpi-ssdt-test-data = "cd";
550		acpi-dsdt-test-data = "jk";
551	};
552
553	clocks {
554		clk_fixed: clk-fixed {
555			compatible = "fixed-clock";
556			#clock-cells = <0>;
557			clock-frequency = <1234>;
558		};
559
560		clk_fixed_factor: clk-fixed-factor {
561			compatible = "fixed-factor-clock";
562			#clock-cells = <0>;
563			clock-div = <3>;
564			clock-mult = <2>;
565			clocks = <&clk_fixed>;
566		};
567
568		osc {
569			compatible = "fixed-clock";
570			#clock-cells = <0>;
571			clock-frequency = <20000000>;
572		};
573	};
574
575	clk_sandbox: clk-sbox {
576		compatible = "sandbox,clk";
577		#clock-cells = <1>;
578		assigned-clocks = <&clk_sandbox 3>;
579		assigned-clock-rates = <321>;
580	};
581
582	clk-test {
583		compatible = "sandbox,clk-test";
584		clocks = <&clk_fixed>,
585			 <&clk_sandbox 1>,
586			 <&clk_sandbox 0>,
587			 <&clk_sandbox 3>,
588			 <&clk_sandbox 2>;
589		clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
590	};
591
592	ccf: clk-ccf {
593		compatible = "sandbox,clk-ccf";
594	};
595
596	efi-media {
597		compatible = "sandbox,efi-media";
598	};
599
600	eth@10002000 {
601		compatible = "sandbox,eth";
602		reg = <0x10002000 0x1000>;
603	};
604
605	eth_5: eth@10003000 {
606		compatible = "sandbox,eth";
607		reg = <0x10003000 0x1000>;
608		nvmem-cells = <&eth5_addr>;
609		nvmem-cell-names = "mac-address";
610	};
611
612	eth_3: sbe5 {
613		compatible = "sandbox,eth";
614		reg = <0x10005000 0x1000>;
615		nvmem-cells = <&eth3_addr>;
616		nvmem-cell-names = "mac-address";
617	};
618
619	eth@10004000 {
620		compatible = "sandbox,eth";
621		reg = <0x10004000 0x1000>;
622	};
623
624	phy_eth0: phy-test-eth {
625		compatible = "sandbox,eth";
626		reg = <0x10007000 0x1000>;
627		mac-address = [ 02 00 11 22 33 49 ];
628		phy-handle = <&ethphy1>;
629		phy-mode = "2500base-x";
630	};
631
632	dsa_eth0: dsa-test-eth {
633		compatible = "sandbox,eth";
634		reg = <0x10006000 0x1000>;
635		nvmem-cells = <&eth4_addr>;
636		nvmem-cell-names = "mac-address";
637	};
638
639	dsa-test {
640		compatible = "sandbox,dsa";
641
642		ports {
643			#address-cells = <1>;
644			#size-cells = <0>;
645			swp_0: port@0 {
646				reg = <0>;
647				label = "lan0";
648				phy-mode = "rgmii-rxid";
649
650				fixed-link {
651					speed = <100>;
652					full-duplex;
653				};
654			};
655
656			swp_1: port@1 {
657				reg = <1>;
658				label = "lan1";
659				phy-mode = "rgmii-txid";
660				fixed-link = <0 1 100 0 0>;
661			};
662
663			port@2 {
664				reg = <2>;
665				ethernet = <&dsa_eth0>;
666
667				fixed-link {
668					speed = <1000>;
669					full-duplex;
670				};
671			};
672		};
673	};
674
675	firmware {
676		sandbox_firmware: sandbox-firmware {
677			compatible = "sandbox,firmware";
678		};
679
680		scmi {
681			compatible = "sandbox,scmi-agent";
682			#address-cells = <1>;
683			#size-cells = <0>;
684
685			protocol@10 {
686				reg = <0x10>;
687			};
688
689			clk_scmi: protocol@14 {
690				reg = <0x14>;
691				#clock-cells = <1>;
692			};
693
694			reset_scmi: protocol@16 {
695				reg = <0x16>;
696				#reset-cells = <1>;
697			};
698
699			protocol@17 {
700				reg = <0x17>;
701
702				regulators {
703					#address-cells = <1>;
704					#size-cells = <0>;
705
706					regul0_scmi: reg@0 {
707						reg = <0>;
708						regulator-name = "sandbox-voltd0";
709						regulator-min-microvolt = <1100000>;
710						regulator-max-microvolt = <3300000>;
711					};
712					regul1_scmi: reg@1 {
713						reg = <0x1>;
714						regulator-name = "sandbox-voltd1";
715						regulator-min-microvolt = <1800000>;
716					};
717				};
718			};
719		};
720	};
721
722	fpga {
723		compatible = "sandbox,fpga";
724	};
725
726	pinctrl-gpio {
727		compatible = "sandbox,pinctrl-gpio";
728
729		gpio_a: base-gpios {
730			compatible = "sandbox,gpio";
731			gpio-controller;
732			#gpio-cells = <1>;
733			gpio-bank-name = "a";
734			sandbox,gpio-count = <20>;
735			hog_input_active_low {
736				gpio-hog;
737				input;
738				gpios = <10 GPIO_ACTIVE_LOW>;
739			};
740			hog_input_active_high {
741				gpio-hog;
742				input;
743				gpios = <11 GPIO_ACTIVE_HIGH>;
744			};
745			hog_output_low {
746				gpio-hog;
747				output-low;
748				gpios = <12 GPIO_ACTIVE_HIGH>;
749			};
750			hog_output_high {
751				gpio-hog;
752				output-high;
753				gpios = <13 GPIO_ACTIVE_HIGH>;
754			};
755		};
756
757		gpio_b: extra-gpios {
758			compatible = "sandbox,gpio";
759			gpio-controller;
760			#gpio-cells = <5>;
761			gpio-bank-name = "b";
762			sandbox,gpio-count = <10>;
763		};
764
765		gpio_c: pinmux-gpios {
766			compatible = "sandbox,gpio";
767			gpio-controller;
768			#gpio-cells = <2>;
769			gpio-bank-name = "c";
770			sandbox,gpio-count = <10>;
771		};
772	};
773
774	i2c@0 {
775		#address-cells = <1>;
776		#size-cells = <0>;
777		reg = <0 1>;
778		compatible = "sandbox,i2c";
779		clock-frequency = <100000>;
780		pinctrl-names = "default";
781		pinctrl-0 = <&pinmux_i2c0_pins>;
782
783		eeprom@2c {
784			#address-cells = <1>;
785			#size-cells = <1>;
786			reg = <0x2c>;
787			compatible = "i2c-eeprom";
788			sandbox,emul = <&emul_eeprom>;
789			partitions {
790				compatible = "fixed-partitions";
791				#address-cells = <1>;
792				#size-cells = <1>;
793				bootcount_i2c: bootcount@10 {
794					reg = <10 2>;
795				};
796			};
797
798			eth3_addr: mac-address@24 {
799				reg = <24 6>;
800			};
801		};
802
803		rtc_0: rtc@43 {
804			#address-cells = <1>;
805			#size-cells = <1>;
806			reg = <0x43>;
807			compatible = "sandbox-rtc";
808			sandbox,emul = <&emul0>;
809
810			eth4_addr: mac-address@40 {
811				reg = <0x40 6>;
812			};
813		};
814
815		rtc_1: rtc@61 {
816			reg = <0x61>;
817			compatible = "sandbox-rtc";
818			sandbox,emul = <&emul1>;
819		};
820
821		i2c_emul: emul {
822			reg = <0xff>;
823			compatible = "sandbox,i2c-emul-parent";
824			emul_eeprom: emul-eeprom {
825				compatible = "sandbox,i2c-eeprom";
826				sandbox,filename = "i2c.bin";
827				sandbox,size = <256>;
828			};
829			emul0: emul0 {
830				compatible = "sandbox,i2c-rtc-emul";
831			};
832			emul1: emull {
833				compatible = "sandbox,i2c-rtc-emul";
834			};
835		};
836
837		sandbox_pmic: sandbox_pmic {
838			reg = <0x40>;
839			sandbox,emul = <&emul_pmic0>;
840		};
841
842		mc34708: pmic@41 {
843			reg = <0x41>;
844			sandbox,emul = <&emul_pmic1>;
845		};
846	};
847
848	bootcount@0 {
849		compatible = "u-boot,bootcount-rtc";
850		rtc = <&rtc_1>;
851		offset = <0x13>;
852	};
853
854	bootcount {
855		compatible = "u-boot,bootcount-i2c-eeprom";
856		i2c-eeprom = <&bootcount_i2c>;
857	};
858
859	bootcount_4@0 {
860		compatible = "u-boot,bootcount-syscon";
861		syscon = <&syscon0>;
862		reg = <0x0 0x04>, <0x0 0x04>;
863		reg-names = "syscon_reg", "offset";
864	};
865
866	bootcount_2@0 {
867		compatible = "u-boot,bootcount-syscon";
868		syscon = <&syscon0>;
869		reg = <0x0 0x04>, <0x0 0x02> ;
870		reg-names = "syscon_reg", "offset";
871	};
872
873	adc: adc@0 {
874		compatible = "sandbox,adc";
875		#io-channel-cells = <1>;
876		vdd-supply = <&buck2>;
877		vss-microvolts = <0>;
878	};
879
880	iommu: iommu@0 {
881		compatible = "sandbox,iommu";
882		#iommu-cells = <0>;
883	};
884
885	irq: irq {
886		compatible = "sandbox,irq";
887		interrupt-controller;
888		#interrupt-cells = <2>;
889	};
890
891	lcd {
892		bootph-all;
893		compatible = "sandbox,lcd-sdl";
894		pinctrl-names = "default";
895		pinctrl-0 = <&pinmux_lcd_pins>;
896		xres = <1366>;
897		yres = <768>;
898	};
899
900	leds {
901		compatible = "gpio-leds";
902
903		iracibble {
904			gpios = <&gpio_a 1 0>;
905			label = "sandbox:red";
906		};
907
908		martinet {
909			gpios = <&gpio_a 2 0>;
910			label = "sandbox:green";
911		};
912
913		default_on {
914			gpios = <&gpio_a 5 0>;
915			label = "sandbox:default_on";
916			default-state = "on";
917		};
918
919		default_off {
920			gpios = <&gpio_a 6 0>;
921			/* label intentionally omitted */
922			default-state = "off";
923		};
924	};
925
926	wdt-gpio-toggle {
927		gpios = <&gpio_a 7 0>;
928		compatible = "linux,wdt-gpio";
929		hw_margin_ms = <100>;
930		hw_algo = "toggle";
931		always-running;
932	};
933
934	wdt-gpio-level {
935		gpios = <&gpio_a 7 0>;
936		compatible = "linux,wdt-gpio";
937		hw_margin_ms = <100>;
938		hw_algo = "level";
939		always-running;
940	};
941
942	mbox: mbox {
943		compatible = "sandbox,mbox";
944		#mbox-cells = <1>;
945	};
946
947	mbox-test {
948		compatible = "sandbox,mbox-test";
949		mboxes = <&mbox 100>, <&mbox 1>;
950		mbox-names = "other", "test";
951	};
952
953	cpus {
954		#address-cells = <1>;
955		#size-cells = <0>;
956		timebase-frequency = <2000000>;
957		cpu1: cpu@1 {
958			device_type = "cpu";
959			reg = <0x1>;
960			timebase-frequency = <3000000>;
961			compatible = "sandbox,cpu_sandbox";
962			bootph-all;
963		};
964
965		cpu2: cpu@2 {
966			device_type = "cpu";
967			reg = <0x2>;
968			compatible = "sandbox,cpu_sandbox";
969			bootph-all;
970		};
971
972		cpu3: cpu@3 {
973			device_type = "cpu";
974			reg = <0x3>;
975			compatible = "sandbox,cpu_sandbox";
976			bootph-all;
977		};
978	};
979
980	chipid: chipid {
981		compatible = "sandbox,soc";
982	};
983
984	i2s: i2s {
985		compatible = "sandbox,i2s";
986		#sound-dai-cells = <1>;
987		sandbox,silent;	/* Don't emit sounds while testing */
988	};
989
990	nop-test_0 {
991		compatible = "sandbox,nop_sandbox1";
992		nop-test_1 {
993			compatible = "sandbox,nop_sandbox2";
994			bind = "True";
995		};
996		nop-test_2 {
997			compatible = "sandbox,nop_sandbox2";
998			bind = "False";
999		};
1000	};
1001
1002	memory-controller {
1003		compatible = "sandbox,memory";
1004	};
1005
1006	misc-test {
1007		#address-cells = <1>;
1008		#size-cells = <1>;
1009		compatible = "sandbox,misc_sandbox";
1010
1011		eth5_addr: mac-address@10 {
1012			reg = <0x10 6>;
1013		};
1014	};
1015
1016	mmc2 {
1017		compatible = "sandbox,mmc";
1018		non-removable;
1019	};
1020
1021	/* This is used for the bootdev tests */
1022	mmc1 {
1023		compatible = "sandbox,mmc";
1024		filename = "mmc1.img";
1025	};
1026
1027	/* This is used for the fastboot tests */
1028	mmc0: mmc0 {
1029		compatible = "sandbox,mmc";
1030	};
1031
1032	/* This is used for VBE VPL tests */
1033	mmc3 {
1034		status = "disabled";
1035		compatible = "sandbox,mmc";
1036		filename = "image.bin";
1037		non-removable;
1038	};
1039
1040	/* This is used for bootstd bootmenu tests */
1041	mmc4 {
1042		status = "disabled";
1043		compatible = "sandbox,mmc";
1044		filename = "mmc4.img";
1045	};
1046
1047	pch {
1048		compatible = "sandbox,pch";
1049	};
1050
1051	pci0: pci@0 {
1052		compatible = "sandbox,pci";
1053		device_type = "pci";
1054		bus-range = <0x00 0xff>;
1055		#address-cells = <3>;
1056		#size-cells = <2>;
1057		ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
1058				0x01000000 0 0x20000000 0x20000000 0 0x2000>;
1059		iommu-map = <0x0010 &iommu 0 1>;
1060		iommu-map-mask = <0xfffffff8>;
1061		pci@0,0 {
1062			compatible = "pci-generic";
1063			reg = <0x0000 0 0 0 0>;
1064			sandbox,emul = <&swap_case_emul0_0>;
1065		};
1066		pci@1,0 {
1067			compatible = "pci-generic";
1068			/* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
1069			reg = <0x02000814 0 0 0 0
1070			       0x01000810 0 0 0 0>;
1071			sandbox,emul = <&swap_case_emul0_1>;
1072		};
1073		p2sb-pci@2,0 {
1074			compatible = "sandbox,p2sb";
1075			reg = <0x02001010 0 0 0 0>;
1076			sandbox,emul = <&p2sb_emul>;
1077
1078			adder {
1079				intel,p2sb-port-id = <3>;
1080				compatible = "sandbox,adder";
1081			};
1082		};
1083		pci@1e,0 {
1084			compatible = "sandbox,pmc";
1085			reg = <0xf000 0 0 0 0>;
1086			sandbox,emul = <&pmc_emul1e>;
1087			acpi-base = <0x400>;
1088			gpe0-dwx-mask = <0xf>;
1089			gpe0-dwx-shift-base = <4>;
1090			gpe0-dw = <6 7 9>;
1091			gpe0-sts = <0x20>;
1092			gpe0-en = <0x30>;
1093		};
1094		pci@1f,0 {
1095			compatible = "pci-generic";
1096			/* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
1097			reg = <0x0100f810 0 0 0 0>;
1098			sandbox,emul = <&swap_case_emul0_1f>;
1099		};
1100	};
1101
1102	pci-emul0 {
1103		compatible = "sandbox,pci-emul-parent";
1104		swap_case_emul0_0: emul0@0,0 {
1105			compatible = "sandbox,swap-case";
1106		};
1107		swap_case_emul0_1: emul0@1,0 {
1108			compatible = "sandbox,swap-case";
1109			use-ea;
1110		};
1111		swap_case_emul0_1f: emul0@1f,0 {
1112			compatible = "sandbox,swap-case";
1113		};
1114		p2sb_emul: emul@2,0 {
1115			compatible = "sandbox,p2sb-emul";
1116		};
1117		pmc_emul1e: emul@1e,0 {
1118			compatible = "sandbox,pmc-emul";
1119		};
1120	};
1121
1122	pci1: pci@1 {
1123		compatible = "sandbox,pci";
1124		device_type = "pci";
1125		bus-range = <0x00 0xff>;
1126		#address-cells = <3>;
1127		#size-cells = <2>;
1128		ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
1129			  0x02000000 0 0x31000000 0x3e000000 0 0x2000 // MEM1
1130			  0x01000000 0 0x40000000 0x40000000 0 0x2000>;
1131		sandbox,dev-info = <0x08 0x00 0x1234 0x5678
1132				    0x0c 0x00 0x1234 0x5678
1133				    0x10 0x00 0x1234 0x5678>;
1134		pci@10,0 {
1135			reg = <0x8000 0 0 0 0>;
1136		};
1137	};
1138
1139	pci2: pci@2 {
1140		compatible = "sandbox,pci";
1141		device_type = "pci";
1142		bus-range = <0x00 0xff>;
1143		#address-cells = <3>;
1144		#size-cells = <2>;
1145		ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
1146				0x01000000 0 0x60000000 0x60000000 0 0x2000>;
1147		sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
1148		pci@1f,0 {
1149			compatible = "pci-generic";
1150			reg = <0xf800 0 0 0 0>;
1151			sandbox,emul = <&swap_case_emul2_1f>;
1152		};
1153	};
1154
1155	pci-emul2 {
1156		compatible = "sandbox,pci-emul-parent";
1157		swap_case_emul2_1f: emul2@1f,0 {
1158			compatible = "sandbox,swap-case";
1159		};
1160	};
1161
1162	pci_ep: pci_ep {
1163		compatible = "sandbox,pci_ep";
1164	};
1165
1166	probing {
1167		compatible = "simple-bus";
1168		test1 {
1169			compatible = "denx,u-boot-probe-test";
1170		};
1171
1172		test2 {
1173			compatible = "denx,u-boot-probe-test";
1174		};
1175
1176		test3 {
1177			compatible = "denx,u-boot-probe-test";
1178		};
1179
1180		test4 {
1181			compatible = "denx,u-boot-probe-test";
1182			first-syscon = <&syscon0>;
1183			second-sys-ctrl = <&another_system_controller>;
1184			third-syscon = <&syscon2>;
1185		};
1186	};
1187
1188	pwrdom: power-domain {
1189		compatible = "sandbox,power-domain";
1190		#power-domain-cells = <1>;
1191	};
1192
1193	power-domain-test {
1194		compatible = "sandbox,power-domain-test";
1195		power-domains = <&pwrdom 2>;
1196	};
1197
1198	pwm: pwm {
1199		compatible = "sandbox,pwm";
1200		#pwm-cells = <2>;
1201		pinctrl-names = "default";
1202		pinctrl-0 = <&pinmux_pwm_pins>;
1203	};
1204
1205	pwm2 {
1206		compatible = "sandbox,pwm";
1207		#pwm-cells = <2>;
1208	};
1209
1210	ram {
1211		compatible = "sandbox,ram";
1212	};
1213
1214	reset@0 {
1215		compatible = "sandbox,warm-reset";
1216		bootph-some-ram;
1217	};
1218
1219	reset@1 {
1220		compatible = "sandbox,reset";
1221		bootph-some-ram;
1222	};
1223
1224	resetc: reset-ctl {
1225		compatible = "sandbox,reset-ctl";
1226		#reset-cells = <1>;
1227	};
1228
1229	reset-ctl-test {
1230		compatible = "sandbox,reset-ctl-test";
1231		resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>;
1232		reset-names = "other", "test", "test2", "test3";
1233	};
1234
1235	rng {
1236		compatible = "sandbox,sandbox-rng";
1237	};
1238
1239	rproc_1: rproc@1 {
1240		compatible = "sandbox,test-processor";
1241		remoteproc-name = "remoteproc-test-dev1";
1242	};
1243
1244	rproc_2: rproc@2 {
1245		compatible = "sandbox,test-processor";
1246		internal-memory-mapped;
1247		remoteproc-name = "remoteproc-test-dev2";
1248	};
1249
1250	panel {
1251		compatible = "simple-panel";
1252		backlight = <&backlight 0 100>;
1253	};
1254
1255	scsi {
1256		compatible = "sandbox,scsi";
1257		sandbox,filepath = "scsi.img";
1258	};
1259
1260	smem@0 {
1261		compatible = "sandbox,smem";
1262	};
1263
1264	sound {
1265		compatible = "sandbox,sound";
1266		cpu {
1267			sound-dai = <&i2s 0>;
1268		};
1269
1270		codec {
1271			sound-dai = <&audio 0>;
1272		};
1273	};
1274
1275	spi@0 {
1276		#address-cells = <1>;
1277		#size-cells = <0>;
1278		reg = <0 1>;
1279		compatible = "sandbox,spi";
1280		cs-gpios = <0>, <0>, <&gpio_a 0>;
1281		pinctrl-names = "default";
1282		pinctrl-0 = <&pinmux_spi0_pins>;
1283
1284		spi.bin@0 {
1285			reg = <0>;
1286			compatible = "spansion,m25p16", "jedec,spi-nor";
1287			spi-max-frequency = <40000000>;
1288			sandbox,filename = "spi.bin";
1289		};
1290		spi.bin@1 {
1291			reg = <1>;
1292			compatible = "spansion,m25p16", "jedec,spi-nor";
1293			spi-max-frequency = <50000000>;
1294			sandbox,filename = "spi.bin";
1295			spi-cpol;
1296			spi-cpha;
1297		};
1298	};
1299
1300	syscon0: syscon@0 {
1301		compatible = "sandbox,syscon0";
1302		reg = <0x10 16>;
1303	};
1304
1305	another_system_controller: syscon@1 {
1306		compatible = "sandbox,syscon1";
1307		reg = <0x20 5
1308			0x28 6
1309			0x30 7
1310			0x38 8>;
1311	};
1312
1313	syscon2: syscon@2 {
1314		compatible = "simple-mfd", "syscon";
1315		reg = <0x40 5
1316			0x48 6
1317			0x50 7
1318			0x58 8>;
1319	};
1320
1321	syscon3: syscon@3 {
1322		compatible = "simple-mfd", "syscon";
1323		reg = <0x000100 0x10>;
1324
1325		muxcontroller0: a-mux-controller {
1326			compatible = "mmio-mux";
1327			#mux-control-cells = <1>;
1328
1329			mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
1330					<0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
1331					<0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
1332			idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
1333			u-boot,mux-autoprobe;
1334		};
1335	};
1336
1337	muxcontroller1: emul-mux-controller {
1338		compatible = "mux-emul";
1339		#mux-control-cells = <0>;
1340		u-boot,mux-autoprobe;
1341		idle-state = <0xabcd>;
1342	};
1343
1344	testfdtm0 {
1345		compatible = "denx,u-boot-fdtm-test";
1346	};
1347
1348	testfdtm1: testfdtm1 {
1349		compatible = "denx,u-boot-fdtm-test";
1350	};
1351
1352	testfdtm2 {
1353		compatible = "denx,u-boot-fdtm-test";
1354	};
1355
1356	timer@0 {
1357		compatible = "sandbox,timer";
1358		clock-frequency = <1000000>;
1359	};
1360
1361	timer@1 {
1362		compatible = "sandbox,timer";
1363		sandbox,timebase-frequency-fallback;
1364	};
1365
1366	tpm2 {
1367		compatible = "sandbox,tpm2";
1368	};
1369
1370	tpm {
1371		compatible = "google,sandbox-tpm";
1372	};
1373
1374	uart0: serial {
1375		compatible = "sandbox,serial";
1376		bootph-all;
1377		pinctrl-names = "default";
1378		pinctrl-0 = <&pinmux_uart0_pins>;
1379	};
1380
1381	usb_0: usb@0 {
1382		compatible = "sandbox,usb";
1383		status = "disabled";
1384		hub {
1385			compatible = "sandbox,usb-hub";
1386			#address-cells = <1>;
1387			#size-cells = <0>;
1388			flash-stick {
1389				reg = <0>;
1390				compatible = "sandbox,usb-flash";
1391			};
1392		};
1393	};
1394
1395	usb_1: usb@1 {
1396		compatible = "sandbox,usb";
1397		iommus = <&iommu>;
1398		hub {
1399			compatible = "usb-hub";
1400			usb,device-class = <9>;
1401			#address-cells = <1>;
1402			#size-cells = <0>;
1403			hub-emul {
1404				compatible = "sandbox,usb-hub";
1405				#address-cells = <1>;
1406				#size-cells = <0>;
1407				flash-stick@0 {
1408					reg = <0>;
1409					compatible = "sandbox,usb-flash";
1410					sandbox,filepath = "testflash.bin";
1411				};
1412
1413				flash-stick@1 {
1414					reg = <1>;
1415					compatible = "sandbox,usb-flash";
1416					sandbox,filepath = "testflash1.bin";
1417				};
1418
1419				flash-stick@2 {
1420					reg = <2>;
1421					compatible = "sandbox,usb-flash";
1422					sandbox,filepath = "testflash2.bin";
1423				};
1424
1425				keyb@3 {
1426					reg = <3>;
1427					compatible = "sandbox,usb-keyb";
1428				};
1429
1430			};
1431
1432			usbstor@1 {
1433				reg = <1>;
1434			};
1435			usbstor@3 {
1436				reg = <3>;
1437			};
1438		};
1439	};
1440
1441	usb_2: usb@2 {
1442		compatible = "sandbox,usb";
1443		status = "disabled";
1444	};
1445
1446	spmi: spmi@0 {
1447		compatible = "sandbox,spmi";
1448		#address-cells = <0x1>;
1449		#size-cells = <0x1>;
1450		ranges;
1451		pm8916@0 {
1452			compatible = "qcom,spmi-pmic";
1453			reg = <0x0 0x1>;
1454			#address-cells = <0x1>;
1455			#size-cells = <0x1>;
1456			ranges;
1457
1458			spmi_gpios: gpios@c000 {
1459				compatible = "qcom,pm8916-gpio";
1460				reg = <0xc000 0x400>;
1461				gpio-controller;
1462				gpio-count = <4>;
1463				#gpio-cells = <2>;
1464				gpio-bank-name="spmi";
1465			};
1466		};
1467	};
1468
1469	wdt0: wdt@0 {
1470		compatible = "sandbox,wdt";
1471		hw_margin_ms = <200>;
1472	};
1473
1474	axi: axi@0 {
1475		compatible = "sandbox,axi";
1476		#address-cells = <0x1>;
1477		#size-cells = <0x1>;
1478		store@0 {
1479			compatible = "sandbox,sandbox_store";
1480			reg = <0x0 0x400>;
1481		};
1482	};
1483
1484	chosen {
1485		#address-cells = <1>;
1486		#size-cells = <1>;
1487		setting = "sunrise ohoka";
1488		other-node = "/some-bus/c-test@5";
1489		int-values = <0x1937 72993>;
1490		u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
1491		chosen-test {
1492			compatible = "denx,u-boot-fdt-test";
1493			reg = <9 1>;
1494		};
1495	};
1496
1497	translation-test@8000 {
1498		compatible = "simple-bus";
1499		reg = <0x8000 0x4000>;
1500
1501		#address-cells = <0x2>;
1502		#size-cells = <0x1>;
1503
1504		ranges = <0 0x0 0x8000 0x1000
1505			  1 0x100 0x9000 0x1000
1506			  2 0x200 0xA000 0x1000
1507			  3 0x300 0xB000 0x1000
1508			 >;
1509
1510		dma-ranges = <0 0x000 0x10000000 0x1000
1511			      1 0x100 0x20000000 0x1000
1512			     >;
1513
1514		dev@0,0 {
1515			compatible = "denx,u-boot-fdt-dummy";
1516			reg = <0 0x0 0x1000>;
1517			reg-names = "sandbox-dummy-0";
1518		};
1519
1520		dev@1,100 {
1521			compatible = "denx,u-boot-fdt-dummy";
1522			reg = <1 0x100 0x1000>;
1523
1524		};
1525
1526		dev@2,200 {
1527			compatible = "denx,u-boot-fdt-dummy";
1528			reg = <2 0x200 0x1000>;
1529		};
1530
1531
1532		noxlatebus@3,300 {
1533			compatible = "simple-bus";
1534			reg = <3 0x300 0x1000>;
1535
1536			#address-cells = <0x1>;
1537			#size-cells = <0x0>;
1538
1539			dev@42 {
1540				compatible = "denx,u-boot-fdt-dummy";
1541				reg = <0x42>;
1542			};
1543		};
1544	};
1545
1546	ofnode-foreach {
1547		compatible = "foreach";
1548
1549		first {
1550			prop1 = <1>;
1551			prop2 = <2>;
1552		};
1553
1554		second {
1555			prop1 = <1>;
1556			prop2 = <2>;
1557		};
1558	};
1559
1560	osd {
1561		compatible = "sandbox,sandbox_osd";
1562	};
1563
1564	sandbox_tee {
1565		compatible = "sandbox,tee";
1566	};
1567
1568	sandbox_virtio1 {
1569		compatible = "sandbox,virtio1";
1570		virtio-type = <4>;	/* rng */
1571	};
1572
1573	sandbox_virtio2 {
1574		compatible = "sandbox,virtio2";
1575	};
1576
1577	sandbox-virtio-blk {
1578		compatible = "sandbox,virtio1";
1579		virtio-type = <2>;	/* block */
1580	};
1581
1582	sandbox_scmi {
1583		compatible = "sandbox,scmi-devices";
1584		clocks = <&clk_scmi 2>, <&clk_scmi 0>;
1585		resets = <&reset_scmi 3>;
1586		regul0-supply = <&regul0_scmi>;
1587		regul1-supply = <&regul1_scmi>;
1588	};
1589
1590	pinctrl {
1591		compatible = "sandbox,pinctrl";
1592
1593		pinctrl-names = "default", "alternate";
1594		pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
1595		pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
1596
1597		pinctrl_gpios: gpios {
1598			gpio0 {
1599				pins = "P5";
1600				function = "GPIO";
1601				bias-pull-up;
1602				input-disable;
1603			};
1604			gpio1 {
1605				pins = "P6";
1606				function = "GPIO";
1607				output-high;
1608				drive-open-drain;
1609			};
1610			gpio2 {
1611				pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
1612				bias-pull-down;
1613				input-enable;
1614			};
1615			gpio3 {
1616				pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
1617				bias-disable;
1618			};
1619		};
1620
1621		pinctrl_i2c: i2c {
1622			groups {
1623				groups = "I2C_UART";
1624				function = "I2C";
1625			};
1626
1627			pins {
1628				pins = "P0", "P1";
1629				drive-open-drain;
1630			};
1631		};
1632
1633		pinctrl_i2s: i2s {
1634			groups = "SPI_I2S";
1635			function = "I2S";
1636		};
1637
1638		pinctrl_spi: spi {
1639			groups = "SPI_I2S";
1640			function = "SPI";
1641
1642			cs {
1643				pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
1644					 <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
1645			};
1646		};
1647	};
1648
1649	pinctrl-single-no-width {
1650		compatible = "pinctrl-single";
1651		reg = <0x0000 0x238>;
1652		#pinctrl-cells = <1>;
1653		pinctrl-single,function-mask = <0x7f>;
1654	};
1655
1656	pinctrl-single-pins {
1657		compatible = "pinctrl-single";
1658		reg = <0x0000 0x238>;
1659		#pinctrl-cells = <1>;
1660		pinctrl-single,register-width = <32>;
1661		pinctrl-single,function-mask = <0x7f>;
1662
1663		pinmux_pwm_pins: pinmux_pwm_pins {
1664			pinctrl-single,pins = < 0x48 0x06 >;
1665		};
1666
1667		pinmux_spi0_pins: pinmux_spi0_pins {
1668			pinctrl-single,pins = <
1669				0x190 0x0c
1670				0x194 0x0c
1671				0x198 0x23
1672				0x19c 0x0c
1673			>;
1674		};
1675
1676		pinmux_uart0_pins: pinmux_uart0_pins {
1677			pinctrl-single,pins = <
1678				0x70 0x30
1679				0x74 0x00
1680			>;
1681		};
1682	};
1683
1684	pinctrl-single-bits {
1685		compatible = "pinctrl-single";
1686		reg = <0x0000 0x50>;
1687		#pinctrl-cells = <2>;
1688		pinctrl-single,bit-per-mux;
1689		pinctrl-single,register-width = <32>;
1690		pinctrl-single,function-mask = <0xf>;
1691
1692		pinmux_i2c0_pins: pinmux_i2c0_pins {
1693			pinctrl-single,bits = <
1694				0x10 0x00002200 0x0000ff00
1695			>;
1696		};
1697
1698		pinmux_lcd_pins: pinmux_lcd_pins {
1699			pinctrl-single,bits = <
1700				0x40 0x22222200 0xffffff00
1701				0x44 0x22222222 0xffffffff
1702				0x48 0x00000022 0x000000ff
1703				0x48 0x02000000 0x0f000000
1704				0x4c 0x02000022 0x0f0000ff
1705			>;
1706		};
1707	};
1708
1709	hwspinlock@0 {
1710		compatible = "sandbox,hwspinlock";
1711	};
1712
1713	dma: dma {
1714		compatible = "sandbox,dma";
1715		#dma-cells = <1>;
1716
1717		dmas = <&dma 0>, <&dma 1>, <&dma 2>;
1718		dma-names = "m2m", "tx0", "rx0";
1719	};
1720
1721	/*
1722	 * keep mdio-mux ahead of mdio so that the mux is removed first at the
1723	 * end of the test.  If parent mdio is removed first, clean-up of the
1724	 * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
1725	 * active at the end of the test.  That it turn doesn't allow the mdio
1726	 * class to be destroyed, triggering an error.
1727	 */
1728	mdio-mux-test {
1729		compatible = "sandbox,mdio-mux";
1730		#address-cells = <1>;
1731		#size-cells = <0>;
1732		mdio-parent-bus = <&mdio>;
1733
1734		mdio-ch-test@0 {
1735			reg = <0>;
1736		};
1737		mdio-ch-test@1 {
1738			reg = <1>;
1739		};
1740	};
1741
1742	mdio: mdio-test {
1743		compatible = "sandbox,mdio";
1744		#address-cells = <1>;
1745		#size-cells = <0>;
1746
1747		ethphy1: ethernet-phy@1 {
1748			reg = <1>;
1749		};
1750	};
1751
1752	pm-bus-test {
1753		compatible = "simple-pm-bus";
1754		clocks = <&clk_sandbox 4>;
1755		power-domains = <&pwrdom 1>;
1756	};
1757
1758	resetc2: syscon-reset {
1759		compatible = "syscon-reset";
1760		#reset-cells = <1>;
1761		regmap = <&syscon0>;
1762		offset = <1>;
1763		mask = <0x27FFFFFF>;
1764		assert-high = <0>;
1765	};
1766
1767	syscon-reset-test {
1768		compatible = "sandbox,misc_sandbox";
1769		resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
1770		reset-names = "valid", "no_mask", "out_of_range";
1771	};
1772
1773	sysinfo {
1774		compatible = "sandbox,sysinfo-sandbox";
1775	};
1776
1777	sysinfo-gpio {
1778		compatible = "gpio-sysinfo";
1779		gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>;
1780		revisions = <19>, <5>;
1781		names = "rev_a", "foo";
1782	};
1783
1784	some_regmapped-bus {
1785		#address-cells = <0x1>;
1786		#size-cells = <0x1>;
1787
1788		ranges = <0x0 0x0 0x10>;
1789		compatible = "simple-bus";
1790
1791		regmap-test_0 {
1792			reg = <0 0x10>;
1793			compatible = "sandbox,regmap_test";
1794		};
1795	};
1796
1797	thermal {
1798		compatible = "sandbox,thermal";
1799	};
1800
1801	fwu-mdata {
1802		compatible = "u-boot,fwu-mdata-gpt";
1803		fwu-mdata-store = <&mmc0>;
1804	};
1805
1806	nvmxip-qspi1@08000000 {
1807		compatible = "nvmxip,qspi";
1808		reg = <0x08000000 0x00200000>;
1809		lba_shift = <9>;
1810		lba = <4096>;
1811	};
1812
1813	nvmxip-qspi2@08200000 {
1814		compatible = "nvmxip,qspi";
1815		reg = <0x08200000 0x00100000>;
1816		lba_shift = <9>;
1817		lba = <2048>;
1818	};
1819
1820	extcon {
1821		compatible = "sandbox,extcon";
1822	};
1823};
1824
1825#include "sandbox_pmic.dtsi"
1826#include "cros-ec-keyboard.dtsi"
1827
1828#ifdef CONFIG_SANDBOX_VPL
1829#include "sandbox_vpl.dtsi"
1830#endif
1831