1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 4 */ 5 6 #ifndef _X86_TABLES_H_ 7 #define _X86_TABLES_H_ 8 9 #include <tables_csum.h> 10 11 #define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR 12 #define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1) 13 14 #define ROM_TABLE_ALIGN 1024 15 16 /* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */ 17 #define CB_TABLE_ADDR 0x800 18 19 /** 20 * table_fill_string() - Fill a string with pad in the configuration table 21 * 22 * This fills a string in the configuration table. It copies number of bytes 23 * from the source string, and if source string length is shorter than the 24 * required size to copy, pad the table string with the given pad character. 25 * 26 * @dest: where to fill a string 27 * @src: where to copy from 28 * @n: number of bytes to copy 29 * @pad: character to pad the remaining bytes 30 */ 31 void table_fill_string(char *dest, const char *src, size_t n, char pad); 32 33 /** 34 * write_tables() - Write x86 configuration tables 35 * 36 * This writes x86 configuration tables, including PIRQ routing table, 37 * Multi-Processor table and ACPI table. Whether a specific type of 38 * configuration table is written is controlled by a Kconfig option. 39 * 40 * Return: 0 if OK, -ENOSPC if table too large 41 */ 42 int write_tables(void); 43 44 /** 45 * write_pirq_routing_table() - Write PIRQ routing table 46 * 47 * This writes PIRQ routing table at a given address. 48 * 49 * @start: start address to write PIRQ routing table 50 * @return: end address of PIRQ routing table 51 */ 52 ulong write_pirq_routing_table(ulong start); 53 54 #endif /* _X86_TABLES_H_ */ 55