1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2017 NXP
4  * Copyright 2020 Linaro
5  *
6  */
7 
8 #ifndef __COMPULAB_DDR_H__
9 #define __COMPULAB_DDR_H__
10 
11 extern struct dram_timing_info ucm_dram_timing_ff020008;
12 extern struct dram_timing_info ucm_dram_timing_ff000110;
13 extern struct dram_timing_info ucm_dram_timing_01061010;
14 
15 void spl_dram_init_compulab(void);
16 
17 #define TCM_DATA_CFG 0x7e0000
18 
19 struct lpddr4_tcm_desc {
20 	unsigned int size;
21 	unsigned int sign;
22 	unsigned int index;
23 	unsigned int count;
24 };
25 
26 u32 cl_eeprom_get_ddrinfo(void);
27 u32 cl_eeprom_set_ddrinfo(u32 ddrinfo);
28 u8 cl_eeprom_get_subind(void);
29 u8 cl_eeprom_set_subind(u8 subind);
30 u32 cl_eeprom_get_osize(void);
31 #endif
32