1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2010-2011 Calxeda, Inc.
4 */
5
6 #include <common.h>
7 #include <ahci.h>
8 #include <cpu_func.h>
9 #include <env.h>
10 #include <fdt_support.h>
11 #include <fdtdec.h>
12 #include <init.h>
13 #include <net.h>
14 #include <scsi.h>
15 #include <asm/global_data.h>
16
17 #include <linux/sizes.h>
18 #include <asm/io.h>
19
20 #define HB_AHCI_BASE 0xffe08000
21
22 #define HB_SCU_A9_PWR_STATUS 0xfff10008
23 #define HB_SREG_A9_PWR_REQ 0xfff3cf00
24 #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
25 #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
26 #define HB_SREG_A15_PWR_CTRL 0xfff3c200
27
28 #define HB_PWR_SUSPEND 0
29 #define HB_PWR_SOFT_RESET 1
30 #define HB_PWR_HARD_RESET 2
31 #define HB_PWR_SHUTDOWN 3
32
33 #define PWRDOM_STAT_SATA 0x80000000
34 #define PWRDOM_STAT_PCI 0x40000000
35 #define PWRDOM_STAT_EMMC 0x20000000
36
37 #define HB_SCU_A9_PWR_NORMAL 0
38 #define HB_SCU_A9_PWR_DORMANT 2
39 #define HB_SCU_A9_PWR_OFF 3
40
41 DECLARE_GLOBAL_DATA_PTR;
42
43 void cphy_disable_overrides(void);
44
45 /*
46 * Miscellaneous platform dependent initialisations
47 */
board_init(void)48 int board_init(void)
49 {
50 icache_enable();
51
52 return 0;
53 }
54
55 #ifdef CONFIG_SCSI_AHCI_PLAT
scsi_init(void)56 void scsi_init(void)
57 {
58 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
59
60 cphy_disable_overrides();
61 if (reg & PWRDOM_STAT_SATA) {
62 ahci_init((void __iomem *)HB_AHCI_BASE);
63 scsi_scan(true);
64 }
65 }
66 #endif
67
68 #ifdef CONFIG_MISC_INIT_R
misc_init_r(void)69 int misc_init_r(void)
70 {
71 char envbuffer[16];
72 u32 boot_choice;
73
74 boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
75 sprintf(envbuffer, "bootcmd%d", boot_choice);
76 if (env_get(envbuffer)) {
77 sprintf(envbuffer, "run bootcmd%d", boot_choice);
78 env_set("bootcmd", envbuffer);
79 } else
80 env_set("bootcmd", "");
81
82 return 0;
83 }
84 #endif
85
dram_init(void)86 int dram_init(void)
87 {
88 return fdtdec_setup_mem_size_base();
89 }
90
dram_init_banksize(void)91 int dram_init_banksize(void)
92 {
93 return fdtdec_setup_memory_banksize();
94 }
95
96 #if defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * fdt,struct bd_info * bd)97 int ft_board_setup(void *fdt, struct bd_info *bd)
98 {
99 static const char disabled[] = "disabled";
100 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
101
102 if (!(reg & PWRDOM_STAT_SATA))
103 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
104 disabled, sizeof(disabled), 1);
105
106 if (!(reg & PWRDOM_STAT_EMMC))
107 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
108 disabled, sizeof(disabled), 1);
109
110 return 0;
111 }
112 #endif
113
board_fdt_blob_setup(int * err)114 void *board_fdt_blob_setup(int *err)
115 {
116 *err = 0;
117 /*
118 * The ECME management processor loads the DTB from NOR flash
119 * into DRAM (at 4KB), where it gets patched to contain the
120 * detected memory size.
121 */
122 return (void *)0x1000;
123 }
124
is_highbank(void)125 static int is_highbank(void)
126 {
127 uint32_t midr;
128
129 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
130
131 return (midr & 0xfff0) == 0xc090;
132 }
133
reset_cpu(void)134 void reset_cpu(void)
135 {
136 writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
137 if (is_highbank())
138 writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
139 else
140 writel(0x1, HB_SREG_A15_PWR_CTRL);
141
142 wfi();
143 }
144
145 /*
146 * turn off the override before transferring control to Linux, since Linux
147 * may not support spread spectrum.
148 */
arch_preboot_os(void)149 void arch_preboot_os(void)
150 {
151 cphy_disable_overrides();
152 }
153