1.. SPDX-License-Identifier: GPL-2.0+
2
3Amlogic SoC Boot Flow
4=====================
5
6Amlogic SoCs follow a pre-defined boot sequence stored in SoC ROM code. The possible boot
7sequences of the different SoC families are:
8
9GX* & AXG Family
10----------------
11
12+----------+-------------------+---------+---------+---------+---------+
13|          |   1               | 2       | 3       | 4       | 5       |
14+==========+===================+=========+=========+=========+=========+
15| S905     | POC=0: SPI NOR    | eMMC    | NAND    | SD      | USB     |
16| S905D    |                   |         |         |         |         |
17| S905L    |                   |         |         |         |         |
18| S905W    |                   |         |         |         |         |
19| S905X    |                   |         |         |         |         |
20| S905Y    |                   |         |         |         |         |
21| S912     |                   |         |         |         |         |
22+----------+-------------------+---------+---------+---------+---------+
23| S805X    | POC=0: SPI NOR    | eMMC    | NAND    | USB     | -       |
24| A113D    |                   |         |         |         |         |
25| A113X    |                   |         |         |         |         |
26+----------+-------------------+---------+---------+---------+---------+
27
28POC pin: `NAND_CLE`
29
30Some boards provide a button to force USB boot by disabling the eMMC clock signal and
31allowing the eMMC step to be bypassed. Others have removable eMMC modules; removing an
32eMMC module and SD card will allow boot from USB.
33
34An exception is the Libre Computer AML-S805X-XX (LaFrite) board which has no SD card
35slot and boots from SPI. Booting a LaFrite board from USB requires either:
36
37 - Erasing the first sectors of SPI NOR flash
38 - Inserting an HDMI boot plug forcing boot over USB
39
40The VIM1 and initial VIM2 boards provide a test point on the eMMC signals to block the
41storage from answering, allowing boot to continue with the next boot step.
42
43USB boot uses the first USB interface. On some boards this port is only available on a
44USB-A type connector and requires a special Type-A to Type-A cable to communicate with
45the BootROM.
46
47G12* & SM1 Family
48-----------------
49
50+-------+-------+-------+------------+------------+------------+-----------+
51| POC0  | POC1  | POC2  | 1          | 2          | 3          | 4         |
52+=======+=======+=======+============+============+============+===========+
53| 0     | 0     | 0     | USB        | SPI-NOR    | NAND/eMMC  | SD        |
54+-------+-------+-------+------------+------------+-------------+----------+
55| 0     | 0     | 1     | USB        | NAND/eMMC  | SD         | -         |
56+-------+-------+-------+------------+------------+------------+-----------+
57| 0     | 1     | 0     | SPI-NOR    | NAND/eMMC  | SD         | USB       |
58+-------+-------+-------+------------+------------+------------+-----------+
59| 0     | 1     | 1     | SPI-NAND   | NAND/eMMC  | USB        | -         |
60+-------+-------+-------+------------+------------+------------+-----------+
61| 1     | 0     | 0     | USB        | SPI-NOR    | NAND/eMMC  | SD        |
62+-------+-------+-------+------------+------------+------------+-----------+
63| 1     | 0     | 1     | USB        | NAND/eMMC  | SD         | -         |
64+-------+-------+-------+------------+------------+------------+-----------+
65| 1     | 1     | 0     | SPI-NOR    | NAND/eMMC  | SD         | USB       |
66+-------+-------+-------+------------+------------+------------+-----------+
67| 1     | 1     | 1     | NAND/eMMC  | SD         | USB        | -         |
68+-------+-------+-------+------------+------------+------------+-----------+
69
70The last option (1/1/1) is the normal default seen on production devices:
71
72 * POC0 pin: `BOOT_4` (0 and all other 1 means SPI NAND boot first)
73 * POC1 pin: `BOOT_5` (0 and all other 1 means USB Device boot first
74 * POC2 pin: `BOOT_6` (0 and all other 1 means SPI NOR boot first)
75
76Most boards provide a button to force USB BOOT which lowers `BOOT_5` to 0. Some boards
77provide a test point on eMMC or SPI NOR clock signals to block storage from answering
78and allowing boot to continue from the next boot step.
79
80The Khadas VIM3/3L boards embed a microcontroller which sets POC signals according to
81its configuration or a specific key press sequence to either boot from SPI NOR or eMMC
82then SD card, or boot as a USB device.
83
84The Odroid N2/N2+ has a hardware switch to select between SPI NOR or eMMC boot. The
85Odroid HC4 has a button to disable SPI-NOR allowing boot from SD card.
86
87Boot Modes
88----------
89
90 * SD
91
92The BootROM fetches the first SD card sectors in one sequence then checks the content of
93the data. It expects to find the FIP binary in sector 1, 512 bytes offset from the start.
94
95 * eMMC
96
97The BootROM fetches the first sectors of the main partition in one sequence then checks
98the content of the data. On GXL and newer boards it expects to find the FIP binary in
99sector 1, 512 bytes offset from the start. If not found it checks the boot0 partition,
100then the boot1 partition. On GXBB it expects to find the FIP binary at an offset that
101conflicts with MBR partition tables, but this has been worked around (thus avoiding the
102need for a partition scheme that relocates the MBR). For a more detailed explanation
103please see: https://github.com/LibreELEC/amlogic-boot-fip/pull/8
104
105 * SPI-NOR
106
107The BootROM fetches the first SPI NOR sectors in one sequence then checks the content of
108the data. It expects to find the FIP binary in sector 1, 512 bytes offset from the start.
109
110 * NAND & SPI-NAND
111
112These modes are rarely used in open platforms and no details are available.
113
114 * USB
115
116The BootROM supports a custom USB protocol and sets the USB Gadget interface to use the
117USB ID 1b8e:c003. The Amlogic `update` utility uses this protocol. It is also supported
118in the Amlogic vendor U-Boot sources.
119
120The `pyamlboot` utility https://github.com/superna9999/pyamlboot is open-source and also
121implements the USB protocol. It can load U-Boot into memory to start the SoC without the
122storage being attached, or to recover the device from a failed/incorrect image flash.
123
124HDMI Recovery Dongle
125--------------------
126
127The BootROM also reads 8 bytes at address I2C 0x52 offset 0xf8 (248) on the HDMI DDC bus
128during startup. The content `boot@USB` forces USB boot. The content `boot@SDC` forces SD
129card boot. The content `boot@SPI` forces SPI-NOT boot. If an SD card or USB device does
130not enumerate the BootROM continues with the normal boot sequence.
131
132HDMI boot dongles can be created by connecting a 256bytes EEPROM set to answer on address
1330x52, with `boot@USB` or `boot@SDC` or `boot@SPI` programmed at offset 0xf8 (248).
134
135If the SoC is booted with USB Device forced at first step, it will retain the forced boot
136order on warm reboot. Only cold reboot (removing power) will reset the boot order.
137