1Specifying interrupt information for devices
2============================================
3
41) Interrupt client nodes
5-------------------------
6
7Nodes that describe devices which generate interrupts must contain an
8"interrupts" property, an "interrupts-extended" property, or both. If both are
9present, the latter should take precedence; the former may be provided simply
10for compatibility with software that does not recognize the latter. These
11properties contain a list of interrupt specifiers, one per output interrupt. The
12format of the interrupt specifier is determined by the interrupt controller to
13which the interrupts are routed; see section 2 below for details.
14
15  Example:
16	interrupt-parent = <&intc1>;
17	interrupts = <5 0>, <6 0>;
18
19The "interrupt-parent" property is used to specify the controller to which
20interrupts are routed and contains a single phandle referring to the interrupt
21controller node. This property is inherited, so it may be specified in an
22interrupt client node or in any of its parent nodes. Interrupts listed in the
23"interrupts" property are always in reference to the node's interrupt parent.
24
25The "interrupts-extended" property is a special form; useful when a node needs
26to reference multiple interrupt parents or a different interrupt parent than
27the inherited one. Each entry in this property contains both the parent phandle
28and the interrupt specifier.
29
30  Example:
31	interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
32
33(NOTE: only this 'special form' is supported in U-Boot)
34
35
362) Interrupt controller nodes
37-----------------------------
38
39A device is marked as an interrupt controller with the "interrupt-controller"
40property. This is a empty, boolean property. An additional "#interrupt-cells"
41property defines the number of cells needed to specify a single interrupt.
42
43It is the responsibility of the interrupt controller's binding to define the
44length and format of the interrupt specifier. The following two variants are
45commonly used:
46
47  a) one cell
48  -----------
49  The #interrupt-cells property is set to 1 and the single cell defines the
50  index of the interrupt within the controller.
51
52  Example:
53
54	vic: intc@10140000 {
55		compatible = "arm,versatile-vic";
56		interrupt-controller;
57		#interrupt-cells = <1>;
58		reg = <0x10140000 0x1000>;
59	};
60
61	sic: intc@10003000 {
62		compatible = "arm,versatile-sic";
63		interrupt-controller;
64		#interrupt-cells = <1>;
65		reg = <0x10003000 0x1000>;
66		interrupt-parent = <&vic>;
67		interrupts = <31>; /* Cascaded to vic */
68	};
69
70  b) two cells
71  ------------
72  The #interrupt-cells property is set to 2 and the first cell defines the
73  index of the interrupt within the controller, while the second cell is used
74  to specify any of the following flags:
75    - bits[3:0] trigger type and level flags
76        1 = low-to-high edge triggered
77        2 = high-to-low edge triggered
78        4 = active high level-sensitive
79        8 = active low level-sensitive
80
81  Example:
82
83	i2c@7000c000 {
84		gpioext: gpio-adnp@41 {
85			compatible = "ad,gpio-adnp";
86			reg = <0x41>;
87
88			interrupt-parent = <&gpio>;
89			interrupts = <160 1>;
90
91			gpio-controller;
92			#gpio-cells = <1>;
93
94			interrupt-controller;
95			#interrupt-cells = <2>;
96
97			nr-gpios = <64>;
98		};
99
100		sx8634@2b {
101			compatible = "smtc,sx8634";
102			reg = <0x2b>;
103
104			interrupt-parent = <&gpioext>;
105			interrupts = <3 0x8>;
106
107			#address-cells = <1>;
108			#size-cells = <0>;
109
110			threshold = <0x40>;
111			sensitivity = <7>;
112		};
113	};
114
115
116Example of special form (supported by U-Boot):
117
118	acpi_gpe: general-purpose-events {
119		reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>;
120		compatible = "intel,acpi-gpe";
121		interrupt-controller;
122		#interrupt-cells = <2>;
123	};
124
125	tpm@50 {
126		reg = <0x50>;
127		compatible = "google,cr50";
128		u-boot,i2c-offset-len = <0>;
129		ready-gpio = <&gpio_n 28 GPIO_ACTIVE_LOW>;
130		interrupts-extended = <&acpi_gpe 0x3c 0>;
131	};
132