1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) Marvell International Ltd. and its affiliates
4  */
5 
6 #ifndef _MV_DDR4_TRAINING_H
7 #define _MV_DDR4_TRAINING_H
8 
9 #include "ddr3_training_ip.h"
10 
11 /* configure DDR4 SDRAM */
12 int mv_ddr4_sdram_config(u32 dev_num);
13 
14 /* configure phy */
15 int mv_ddr4_phy_config(u32 dev_num);
16 
17 /*
18  * configure sstl for manual calibration and pod for automatic one
19  * assumes subphy configured to pod ealier
20  */
21 int mv_ddr4_calibration_adjust(u32 dev_num, u8 vref_en, u8 pod_only);
22 
23 /*
24  * validates calibration values
25  * soc dependent; TODO: check it
26  */
27 int mv_ddr4_calibration_validate(u32 dev_num);
28 
29 u16 mv_ddr4_rtt_nom_to_odt(u16 rtt_nom);
30 u16 mv_ddr4_rtt_wr_to_odt(u16 rtt_wr);
31 
32 #endif /* _MV_DDR4_TRAINING_H */
33