1#
2# I2C subsystem configuration
3#
4
5menuconfig I2C
6	bool "I2C support"
7	default y
8	help
9	  Note:
10	  This is a stand-in for an option to enable I2C support. In fact this
11	  simply enables building of the I2C directory for U-Boot. The actual
12	  I2C feature is enabled by DM_I2C (for driver model) and
13	  the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15	  So at present there is no need to ever disable this option.
16
17	  Eventually it will:
18
19	  Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20	  I2C works with a clock and data line which can be driven by a
21	  one or more masters or slaves. It is a fairly complex bus but is
22	  widely used as it only needs two lines for communication. Speeds of
23	  400kbps are typical but up to 3.4Mbps is supported by some
24	  hardware. Enable this option to build the drivers in drivers/i2c as
25	  part of a U-Boot build.
26
27if I2C
28
29config DM_I2C
30	bool "Enable Driver Model for I2C drivers"
31	depends on DM
32	help
33	  Enable driver model for I2C. The I2C uclass interface: probe, read,
34	  write and speed, is implemented with the bus drivers operations,
35	  which provide methods for bus setting and data transfer. Each chip
36	  device (bus child) info is kept as parent plat. The interface
37	  is defined in include/i2c.h.
38
39config SPL_DM_I2C
40	bool "Enable Driver Model for I2C drivers in SPL"
41	depends on SPL_DM && DM_I2C
42	default y
43	help
44	  Enable driver model for I2C. The I2C uclass interface: probe, read,
45	  write and speed, is implemented with the bus drivers operations,
46	  which provide methods for bus setting and data transfer. Each chip
47	  device (bus child) info is kept as parent platdata. The interface
48	  is defined in include/i2c.h.
49
50config TPL_DM_I2C
51	bool "Enable Driver Model for I2C drivers in TPL"
52	depends on TPL_DM && DM_I2C
53	help
54	  Enable driver model for I2C. The I2C uclass interface: probe, read,
55	  write and speed, is implemented with the bus drivers operations,
56	  which provide methods for bus setting and data transfer. Each chip
57	  device (bus child) info is kept as parent platdata. The interface
58	  is defined in include/i2c.h.
59
60config VPL_DM_I2C
61	bool "Enable Driver Model for I2C drivers in VPL"
62	depends on VPL_DM && DM_I2C
63	default y
64	help
65	  Enable driver model for I2C. The I2C uclass interface: probe, read,
66	  write and speed, is implemented with the bus drivers operations,
67	  which provide methods for bus setting and data transfer. Each chip
68	  device (bus child) info is kept as parent platdata. The interface
69	  is defined in include/i2c.h.
70
71config SYS_I2C_LEGACY
72	bool "Enable legacy I2C subsystem and drivers"
73	depends on !DM_I2C
74	help
75	  Enable the legacy I2C subsystem and drivers.  While this is
76	  deprecated in U-Boot itself, this can be useful in some situations
77	  in SPL or TPL.
78
79config SPL_SYS_I2C_LEGACY
80	bool "Enable legacy I2C subsystem and drivers in SPL"
81	depends on SUPPORT_SPL && !SPL_DM_I2C
82	help
83	  Enable the legacy I2C subsystem and drivers in SPL.  This is useful
84	  in some size constrained situations.
85
86config TPL_SYS_I2C_LEGACY
87	bool "Enable legacy I2C subsystem and drivers in TPL"
88	depends on SUPPORT_TPL && !SPL_DM_I2C
89	help
90	  Enable the legacy I2C subsystem and drivers in TPL.  This is useful
91	  in some size constrained situations.
92
93config SYS_I2C_EARLY_INIT
94	bool "Enable legacy I2C subsystem early in boot"
95	depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
96	help
97	  Add the function prototype for i2c_early_init_f which is called in
98	  board_early_init_f.
99
100config I2C_CROS_EC_TUNNEL
101	tristate "Chrome OS EC tunnel I2C bus"
102	depends on CROS_EC
103	help
104	  This provides an I2C bus that will tunnel i2c commands through to
105	  the other side of the Chrome OS EC to the I2C bus connected there.
106	  This will work whatever the interface used to talk to the EC (SPI,
107	  I2C or LPC). Some Chromebooks use this when the hardware design
108	  does not allow direct access to the main PMIC from the AP.
109
110config I2C_CROS_EC_LDO
111	bool "Provide access to LDOs on the Chrome OS EC"
112	depends on CROS_EC
113	---help---
114	On many Chromebooks the main PMIC is inaccessible to the AP. This is
115	often dealt with by using an I2C pass-through interface provided by
116	the EC. On some unfortunate models (e.g. Spring) the pass-through
117	is not available, and an LDO message is available instead. This
118	option enables a driver which provides very basic access to those
119	regulators, via the EC. We implement this as an I2C bus	which
120	emulates just the TPS65090 messages we know about. This is done to
121	avoid duplicating the logic in the TPS65090 regulator driver for
122	enabling/disabling an LDO.
123
124config I2C_SET_DEFAULT_BUS_NUM
125	bool "Set default I2C bus number"
126	depends on DM_I2C
127	help
128	  Set default number of I2C bus to be accessed. This option provides
129	  behaviour similar to old (i.e. pre DM) I2C bus driver.
130
131config I2C_DEFAULT_BUS_NUMBER
132	hex "I2C default bus number"
133	depends on I2C_SET_DEFAULT_BUS_NUM
134	default 0x0
135	help
136	  Number of default I2C bus to use
137
138config DM_I2C_GPIO
139	bool "Enable Driver Model for software emulated I2C bus driver"
140	depends on DM_I2C && DM_GPIO
141	help
142	  Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
143	  configuration is given by the device tree. Kernel-style device tree
144	  bindings are supported.
145	  Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
146
147config SPL_DM_I2C_GPIO
148	bool "Enable Driver Model for software emulated I2C bus driver in SPL"
149	depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
150	default y
151	help
152	  Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
153	  configuration is given by the device tree. Kernel-style device tree
154	  bindings are supported.
155	  Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
156
157config SYS_I2C_AT91
158	bool "Atmel I2C driver"
159	depends on DM_I2C && ARCH_AT91
160	help
161	  Add support for the Atmel I2C driver. A serious problem is that there
162	  is no documented way to issue repeated START conditions for more than
163	  two messages, as needed to support combined I2C messages. Use the
164	  i2c-gpio driver unless your system can cope with this limitation.
165	  Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
166
167config SYS_I2C_IPROC
168	bool "Broadcom I2C driver"
169	depends on DM_I2C
170	help
171	  Broadcom I2C driver.
172	  Add support for Broadcom I2C driver.
173	  Say yes here to to enable the Broadco I2C driver.
174
175config SYS_I2C_FSL
176       bool "Freescale I2C bus driver"
177       help
178	  Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
179	  MPC85xx processors.
180
181if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
182config SYS_FSL_I2C_OFFSET
183	hex "Offset from the IMMR of the address of the first I2C controller"
184
185config SYS_FSL_HAS_I2C2_OFFSET
186	bool "Support a second I2C controller"
187
188config SYS_FSL_I2C2_OFFSET
189	hex "Offset from the IMMR of the address of the second I2C controller"
190	depends on SYS_FSL_HAS_I2C2_OFFSET
191
192config SYS_FSL_HAS_I2C3_OFFSET
193	bool "Support a third I2C controller"
194
195config SYS_FSL_I2C3_OFFSET
196	hex "Offset from the IMMR of the address of the third I2C controller"
197	depends on SYS_FSL_HAS_I2C3_OFFSET
198
199config SYS_FSL_HAS_I2C4_OFFSET
200	bool "Support a fourth I2C controller"
201
202config SYS_FSL_I2C4_OFFSET
203	hex "Offset from the IMMR of the address of the fourth I2C controller"
204	depends on SYS_FSL_HAS_I2C4_OFFSET
205endif
206
207config SYS_I2C_CADENCE
208	tristate "Cadence I2C Controller"
209	depends on DM_I2C
210	help
211	  Say yes here to select Cadence I2C Host Controller. This controller is
212	  e.g. used by Xilinx Zynq.
213
214config SYS_I2C_CA
215	tristate "Cortina-Access I2C Controller"
216	depends on DM_I2C && CORTINA_PLATFORM
217	help
218	  Add support for the Cortina Access I2C host controller.
219	  Say yes here to select Cortina-Access I2C Host Controller.
220
221config SYS_I2C_DAVINCI
222	bool "Davinci I2C Controller"
223	depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
224	help
225	  Say yes here to add support for Davinci and Keystone I2C controller
226
227config SYS_I2C_DW
228	bool "Designware I2C Controller"
229	help
230	  Say yes here to select the Designware I2C Host Controller. This
231	  controller is used in various SoCs, e.g. the ST SPEAr, Altera
232	  SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
233
234config SYS_I2C_AST2600
235    bool "AST2600 I2C Controller"
236    depends on DM_I2C && ARCH_ASPEED
237    help
238      Say yes here to select AST2600 I2C Host Controller. The driver
239      support AST2600 I2C new mode register. This I2C controller supports:
240      _Standard-mode (up to 100 kHz)
241      _Fast-mode (up to 400 kHz)
242      _Fast-mode Plus (up to 1 MHz)
243
244config SYS_I2C_ASPEED
245	bool "Aspeed I2C Controller"
246	depends on DM_I2C && ARCH_ASPEED
247	help
248	  Say yes here to select Aspeed I2C Host Controller. The driver
249	  supports AST2500 and AST2400 controllers, but is very limited.
250	  Only single master mode is supported and only byte-by-byte
251	  synchronous reads and writes are supported, no Pool Buffers or DMA.
252
253config SYS_I2C_INTEL
254	bool "Intel I2C/SMBUS driver"
255	depends on DM_I2C
256	help
257	  Add support for the Intel SMBUS driver. So far this driver is just
258	  a stub which perhaps some basic init. There is no implementation of
259	  the I2C API meaning that any I2C operations will immediately fail
260	  for now.
261
262config SYS_I2C_IMX_LPI2C
263	bool "NXP i.MX LPI2C driver"
264	help
265	  Add support for the NXP i.MX LPI2C driver.
266
267config SYS_I2C_LPC32XX
268	bool "LPC32XX I2C driver"
269	depends on ARCH_LPC32XX
270	help
271	  Enable support for the LPC32xx I2C driver.
272
273config SYS_I2C_MESON
274	bool "Amlogic Meson I2C driver"
275	depends on DM_I2C && ARCH_MESON
276	help
277	  Add support for the I2C controller available in Amlogic Meson
278	  SoCs. The controller supports programmable bus speed including
279	  standard (100kbits/s) and fast (400kbit/s) speed and allows the
280	  software to define a flexible format of the bit streams. It has an
281	  internal buffer holding up to 8 bytes for transfers and supports
282	  both 7-bit and 10-bit addresses.
283
284config SYS_I2C_MTK
285	bool "MediaTek I2C driver"
286	help
287	  This selects the MediaTek Integrated Inter Circuit bus driver.
288	  The I2C bus adapter is the base for some other I2C client,
289	  eg: touch, sensors.
290	  If you want to use MediaTek I2C interface, say Y here.
291	  If unsure, say N.
292
293config SYS_I2C_MICROCHIP
294	bool "Microchip I2C driver"
295	help
296	  Add support for the Microchip I2C driver. This is operating on
297	  standard mode up to 100 kbits/s and fast mode up to 400 kbits/s.
298
299config SYS_I2C_MXC
300	bool "NXP MXC I2C driver"
301	help
302	  Add support for the NXP I2C driver. This supports up to four bus
303	  channels and operating on standard mode up to 100 kbits/s and fast
304	  mode up to 400 kbits/s.
305
306if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
307config SYS_I2C_MXC_I2C1
308	bool "NXP MXC I2C1"
309	help
310	 Add support for NXP MXC I2C Controller 1.
311	 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
312
313config SYS_I2C_MXC_I2C2
314	bool "NXP MXC I2C2"
315	help
316	 Add support for NXP MXC I2C Controller 2.
317	 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
318
319config SYS_I2C_MXC_I2C3
320	bool "NXP MXC I2C3"
321	help
322	 Add support for NXP MXC I2C Controller 3.
323	 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
324
325config SYS_I2C_MXC_I2C4
326	bool "NXP MXC I2C4"
327	help
328	 Add support for NXP MXC I2C Controller 4.
329	 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
330
331config SYS_I2C_MXC_I2C5
332	bool "NXP MXC I2C5"
333	help
334	 Add support for NXP MXC I2C Controller 5.
335	 Required for SoCs which have I2C MXC controller 5 eg LX2160A
336
337config SYS_I2C_MXC_I2C6
338	bool "NXP MXC I2C6"
339	help
340	 Add support for NXP MXC I2C Controller 6.
341	 Required for SoCs which have I2C MXC controller 6 eg LX2160A
342
343config SYS_I2C_MXC_I2C7
344	bool "NXP MXC I2C7"
345	help
346	 Add support for NXP MXC I2C Controller 7.
347	 Required for SoCs which have I2C MXC controller 7 eg LX2160A
348
349config SYS_I2C_MXC_I2C8
350	bool "NXP MXC I2C8"
351	help
352	 Add support for NXP MXC I2C Controller 8.
353	 Required for SoCs which have I2C MXC controller 8 eg LX2160A
354endif
355
356if SYS_I2C_MXC_I2C1
357config SYS_MXC_I2C1_SPEED
358	int "I2C Channel 1 speed"
359	default 40000000 if TARGET_LS2080A_EMU
360	default 100000
361	help
362	 MXC I2C Channel 1 speed
363
364config SYS_MXC_I2C1_SLAVE
365	hex "I2C1 Slave"
366	default 0
367	help
368	 MXC I2C1 Slave
369endif
370
371if SYS_I2C_MXC_I2C2
372config SYS_MXC_I2C2_SPEED
373	int "I2C Channel 2 speed"
374	default 40000000 if TARGET_LS2080A_EMU
375	default 100000
376	help
377	 MXC I2C Channel 2 speed
378
379config SYS_MXC_I2C2_SLAVE
380	hex "I2C2 Slave"
381	default 0
382	help
383	 MXC I2C2 Slave
384endif
385
386if SYS_I2C_MXC_I2C3
387config SYS_MXC_I2C3_SPEED
388	int "I2C Channel 3 speed"
389	default 100000
390	help
391	 MXC I2C Channel 3 speed
392
393config SYS_MXC_I2C3_SLAVE
394	hex "I2C3 Slave"
395	default 0
396	help
397	 MXC I2C3 Slave
398endif
399
400if SYS_I2C_MXC_I2C4
401config SYS_MXC_I2C4_SPEED
402	int "I2C Channel 4 speed"
403	default 100000
404	help
405	 MXC I2C Channel 4 speed
406
407config SYS_MXC_I2C4_SLAVE
408	hex "I2C4 Slave"
409	default 0
410	help
411	 MXC I2C4 Slave
412endif
413
414if SYS_I2C_MXC_I2C5
415config SYS_MXC_I2C5_SPEED
416	int "I2C Channel 5 speed"
417	default 100000
418	help
419	 MXC I2C Channel 5 speed
420
421config SYS_MXC_I2C5_SLAVE
422	hex "I2C5 Slave"
423	default 0
424	help
425	 MXC I2C5 Slave
426endif
427
428if SYS_I2C_MXC_I2C6
429config SYS_MXC_I2C6_SPEED
430	int "I2C Channel 6 speed"
431	default 100000
432	help
433	 MXC I2C Channel 6 speed
434
435config SYS_MXC_I2C6_SLAVE
436	hex "I2C6 Slave"
437	default 0
438	help
439	 MXC I2C6 Slave
440endif
441
442if SYS_I2C_MXC_I2C7
443config SYS_MXC_I2C7_SPEED
444	int "I2C Channel 7 speed"
445	default 100000
446	help
447	 MXC I2C Channel 7 speed
448
449config SYS_MXC_I2C7_SLAVE
450	hex "I2C7 Slave"
451	default 0
452	help
453	 MXC I2C7 Slave
454endif
455
456if SYS_I2C_MXC_I2C8
457config SYS_MXC_I2C8_SPEED
458	int "I2C Channel 8 speed"
459	default 100000
460	help
461	 MXC I2C Channel 8 speed
462
463config SYS_MXC_I2C8_SLAVE
464	hex "I2C8 Slave"
465	default 0
466	help
467	 MXC I2C8 Slave
468endif
469
470config SYS_I2C_NEXELL
471	bool "Nexell I2C driver"
472	depends on DM_I2C
473	help
474	  Add support for the Nexell I2C driver. This is used with various
475	  Nexell parts such as S5Pxx18 series SoCs. All chips
476	  have several I2C ports and all are provided, controlled by the
477	  device tree.
478
479config SYS_I2C_NPCM
480	bool "Nuvoton NPCM I2C driver"
481	help
482	  Support for Nuvoton I2C controller driver.
483
484config SYS_I2C_OCORES
485	bool "ocores I2C driver"
486	depends on DM_I2C
487	help
488	  Add support for ocores I2C controller. For details see
489	  https://opencores.org/projects/i2c
490
491config SYS_I2C_OMAP24XX
492	bool "TI OMAP2+ I2C driver"
493	depends on ARCH_OMAP2PLUS || ARCH_K3
494	help
495	  Add support for the OMAP2+ I2C driver.
496
497config SYS_I2C_RCAR_I2C
498	bool "Renesas RCar I2C driver"
499	depends on (RCAR_GEN2 || RCAR_64) && DM_I2C
500	help
501	  Support for Renesas RCar I2C controller.
502
503config SYS_I2C_RCAR_IIC
504	bool "Renesas RCar Gen3 IIC driver"
505	depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C
506	help
507	  Support for Renesas RCar Gen3 IIC controller.
508
509config SYS_I2C_ROCKCHIP
510	bool "Rockchip I2C driver"
511	depends on DM_I2C
512	help
513	  Add support for the Rockchip I2C driver. This is used with various
514	  Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
515	  have several I2C ports and all are provided, controlled by the
516	  device tree.
517
518config SYS_I2C_SANDBOX
519	bool "Sandbox I2C driver"
520	depends on SANDBOX && DM_I2C
521	default y
522	help
523	  Enable I2C support for sandbox. This is an emulation of a real I2C
524	  bus. Devices can be attached to the bus using the device tree
525	  which specifies the driver to use.  See sandbox.dts as an example.
526
527config SPL_SYS_I2C_SANDBOX
528	bool "Sandbox I2C driver (SPL)"
529	depends on SPL && SANDBOX && DM_I2C
530	default y
531	help
532	  Enable I2C support for sandbox. This is an emulation of a real I2C
533	  bus. Devices can be attached to the bus using the device tree
534	  which specifies the driver to use.  See sandbox.dts as an example.
535
536config SYS_I2C_SH
537	bool "Legacy SuperH I2C interface"
538	depends on ARCH_RMOBILE && SYS_I2C_LEGACY
539	help
540	  Enable the legacy SuperH I2C interface.
541
542if SYS_I2C_SH
543config SYS_I2C_SH_NUM_CONTROLLERS
544	int
545	default 5
546
547config SYS_I2C_SH_BASE0
548	hex
549	default 0xE6820000
550
551config SYS_I2C_SH_BASE1
552	hex
553	default 0xE6822000
554
555config SYS_I2C_SH_BASE2
556	hex
557	default 0xE6824000
558
559config SYS_I2C_SH_BASE3
560	hex
561	default 0xE6826000
562
563config SYS_I2C_SH_BASE4
564	hex
565	default 0xE6828000
566
567config SH_I2C_8BIT
568	bool
569	default y
570
571config SH_I2C_DATA_HIGH
572	int
573	default 4
574
575config SH_I2C_DATA_LOW
576	int
577	default 5
578
579config SH_I2C_CLOCK
580	int
581	default 104000000
582endif
583
584config SYS_I2C_SOFT
585	bool "Legacy software I2C interface"
586	help
587	  Enable the legacy software defined I2C interface
588
589config SYS_I2C_SOFT_SPEED
590	int "Software I2C bus speed"
591	depends on SYS_I2C_SOFT
592	default 100000
593	help
594	  Speed of the software I2C bus
595
596config SYS_I2C_SOFT_SLAVE
597	hex "Software I2C slave address"
598	depends on SYS_I2C_SOFT
599	default 0xfe
600	help
601	  Slave address of the software I2C bus
602
603config SYS_I2C_OCTEON
604	bool "Octeon II/III/TX/TX2 I2C driver"
605	depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
606	default y
607	help
608	  Add support for the Marvell Octeon I2C driver. This is used with
609	  various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
610	  chips have several I2C ports and all are provided, controlled by
611	  the device tree.
612
613config SYS_I2C_QUP
614	bool "Qualcomm QUP I2C controller"
615	depends on ARCH_SNAPDRAGON
616	help
617	  Support for Qualcomm QUP I2C controller based on Qualcomm Universal
618	  Peripherals (QUP) engine. The QUP engine is an advanced high
619	  performance slave port that provides a common data path (an output
620	  FIFO and an input FIFO) for I2C and SPI interfaces. The I2C/SPI QUP
621	  controller is publicly documented in the Snapdragon 410E (APQ8016E)
622	  Technical Reference Manual, chapter "6.1 Qualcomm Universal
623	  Peripherals Engine (QUP)".
624
625config SYS_I2C_S3C24X0
626	bool "Samsung I2C driver"
627	depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
628	help
629	  Support for Samsung I2C controller as Samsung SoCs.
630
631config SYS_I2C_STM32F7
632	bool "STMicroelectronics STM32F7 I2C support"
633	depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
634	help
635	  Enable this option to add support for STM32 I2C controller
636	  introduced with STM32F7/H7 SoCs. This I2C controller supports :
637	   _ Slave and master modes
638	   _ Multimaster capability
639	   _ Standard-mode (up to 100 kHz)
640	   _ Fast-mode (up to 400 kHz)
641	   _ Fast-mode Plus (up to 1 MHz)
642	   _ 7-bit and 10-bit addressing mode
643	   _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
644	   _ All 7-bit addresses acknowledge mode
645	   _ General call
646	   _ Programmable setup and hold times
647	   _ Easy to use event management
648	   _ Optional clock stretching
649	   _ Software reset
650
651config SYS_I2C_SUN6I_P2WI
652	bool "Allwinner sun6i P2WI controller"
653	depends on ARCH_SUNXI
654	help
655	  Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded
656	  in the Allwinner A31 and A31s SOCs. This interface is used to connect
657	  to specific devices like the X-Powers AXP221 PMIC.
658
659config SYS_I2C_SUN8I_RSB
660	bool "Allwinner sun8i Reduced Serial Bus controller"
661	depends on ARCH_SUNXI
662	help
663	  Support for Allwinner's Reduced Serial Bus (RSB) controller. This
664	  controller is responsible for communicating with various RSB based
665	  devices, such as X-Powers AXPxxx PMICs and AC100/AC200 CODEC ICs.
666
667config SYS_I2C_SYNQUACER
668	bool "Socionext SynQuacer I2C controller"
669	depends on ARCH_SYNQUACER && DM_I2C
670	help
671	  Support for Socionext Synquacer I2C controller. This I2C controller
672	  will be used for RTC and LS-connector on DeveloperBox.
673
674config SYS_I2C_TEGRA
675	bool "NVIDIA Tegra internal I2C controller"
676	depends on ARCH_TEGRA
677	help
678	  Support for NVIDIA I2C controller available in Tegra SoCs.
679
680config SYS_I2C_UNIPHIER
681	bool "UniPhier I2C driver"
682	depends on ARCH_UNIPHIER && DM_I2C
683	default y
684	help
685	  Support for UniPhier I2C controller driver.  This I2C controller
686	  is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
687
688config SYS_I2C_UNIPHIER_F
689	bool "UniPhier FIFO-builtin I2C driver"
690	depends on ARCH_UNIPHIER && DM_I2C
691	default y
692	help
693	  Support for UniPhier FIFO-builtin I2C controller driver.
694	  This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
695
696config SYS_I2C_VERSATILE
697	bool "Arm Ltd Versatile I2C bus driver"
698	depends on DM_I2C && TARGET_VEXPRESS64_JUNO
699	help
700	  Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
701	  controller is present in the development boards manufactured by Arm Ltd.
702
703config SYS_I2C_MV
704	bool "Marvell PXA (Armada 3720) I2C driver"
705	help
706	  Support for PXA based I2C controller used on Armada 3720 SoC.
707	  In Linux, this driver is called i2c-pxa.
708
709config SYS_I2C_MVTWSI
710	bool "Marvell I2C driver"
711	help
712	  Support for Marvell I2C controllers as used on the orion5x and
713	  kirkwood SoC families.
714
715config TEGRA186_BPMP_I2C
716	bool "Enable Tegra186 BPMP-based I2C driver"
717	depends on TEGRA186_BPMP
718	help
719	  Support for Tegra I2C controllers managed by the BPMP (Boot and
720	  Power Management Processor). On Tegra186, some I2C controllers are
721	  directly controlled by the main CPU, whereas others are controlled
722	  by the BPMP, and can only be accessed by the main CPU via IPC
723	  requests to the BPMP. This driver covers the latter case.
724
725config SYS_I2C_SLAVE
726	hex "I2C Slave address channel (all buses)"
727	depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
728	default 0xfe
729	help
730	  I2C Slave address channel 0 for all buses in the legacy drivers.
731	  Many boards/controllers/drivers don't support an I2C slave
732	  interface so provide a default slave address for them for use in
733	  common code.  A real value for CONFIG_SYS_I2C_SLAVE should be
734	  defined for any board which does support a slave interface and
735	  this default used otherwise.
736
737config SYS_I2C_SPEED
738	int "I2C Slave channel 0 speed (all buses)"
739	depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
740	default 100000
741	help
742	  I2C Slave speed channel 0 for all buses in the legacy drivers.
743
744config SYS_I2C_BUS_MAX
745	int "Max I2C busses"
746	depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA
747	default 2 if TI816X
748	default 3 if OMAP34XX || AM33XX || AM43XX
749	default 4 if ARCH_SOCFPGA || OMAP44XX
750	default 5 if OMAP54XX
751	help
752	  Define the maximum number of available I2C buses.
753
754config SYS_I2C_XILINX_XIIC
755	bool "Xilinx AXI I2C driver"
756	depends on DM_I2C
757	help
758	  Support for Xilinx AXI I2C controller.
759
760config SYS_I2C_IHS
761        bool "gdsys IHS I2C driver"
762        depends on DM_I2C
763        help
764          Support for gdsys IHS I2C driver on FPGA bus.
765
766source "drivers/i2c/muxes/Kconfig"
767
768endif
769