1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
4 *
5 * based on:
6 * drivers/led/led_bcm6858.c
7 */
8
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <led.h>
13 #include <log.h>
14 #include <asm/io.h>
15 #include <dm/lists.h>
16 #include <linux/bitops.h>
17
18 #define LEDS_MAX 32
19 #define LEDS_WAIT 100
20
21 /* LED Mode register */
22 #define LED_MODE_REG 0x0
23 #define LED_MODE_OFF 0
24 #define LED_MODE_ON 1
25 #define LED_MODE_MASK 1
26
27 /* LED Controller Global settings register */
28 #define CLED_CTRL_REG 0x00
29 #define CLED_CTRL_SERIAL_LED_DATA_PPOL BIT(1)
30 #define CLED_CTRL_SERIAL_LED_CLK_POL BIT(2)
31 #define CLED_CTRL_SERIAL_LED_EN_POL BIT(3)
32 #define CLED_CTRL_SERIAL_LED_MSB_FIRST BIT(4)
33 #define CLED_CTRL_MASK 0x1E
34 /* LED Controller IP LED source select register */
35 #define CLED_HW_LED_EN_REG 0x04
36 /* Hardware LED Polarity register */
37 #define CLED_HW_LED_IP_PPOL_REG 0x0c
38 /* Soft LED Set Register */
39 #define CLED_SW_LED_IP_SET_REG 0x10
40 /* Parallel LED Output Polarity Register */
41 #define CLED_PLED_OP_PPOL_REG 0x18
42 /* LED Channel activate register */
43 #define CLED_LED_CH_ACTIVATE_REG 0x1c
44 /* LED 0 Config 0 reg */
45 #define CLED_LED_0_CONFIG_0 0x20
46 /* Soft LED Clear Register */
47 #define CLED_SW_LED_IP_CLEAR_REG 0x444
48 /* Soft LED Status Register */
49 #define CLED_SW_LED_IP_STATUS_REG 0x448
50
51 /* Size of all registers used for the config of one LED */
52 #define CLED_CONFIG_SIZE (4 * sizeof(u32))
53
54 #define CLED_CONFIG0_MODE 0
55 #define CLED_CONFIG0_MODE_MASK (BIT(0) | BIT(1))
56 #define CLED_CONFIG0_MODE_STEADY 0
57 #define CLED_CONFIG0_MODE_FADING 1
58 #define CLED_CONFIG0_MODE_PULSATING 2
59
60 #define CLED_CONFIG0_FLASH_CTRL_SHIFT 3
61 #define CLED_CONFIG0_FLASH_CTRL_MASK (BIT(3) | BIT(4) | BIT(5))
62
63 struct bcm6753_led_priv {
64 void __iomem *regs;
65 u8 pin;
66 };
67
68 /*
69 * The value for flash rate are:
70 * 0 : no blinking
71 * 1 : rate is 25 Hz => 40 ms (period)
72 * 2 : rate is 12.5 Hz => 80 ms (period)
73 * 3 : rate is 6.25 Hz => 160 ms (period)
74 * 4 : rate is 3.125 Hz => 320 ms (period)
75 * 5 : rate is 1.5625 Hz => 640 ms (period)
76 * 6 : rate is 0.7815 Hz => 1280 ms (period)
77 * 7 : rate is 0.390625 Hz => 2560 ms (period)
78 */
79 static const int bcm6753_flash_rate[8] = {
80 0, 40, 80, 160, 320, 640, 1280, 2560
81 };
82
bcm6753_flash_rate_value(int period_ms)83 static u32 bcm6753_flash_rate_value(int period_ms)
84 {
85 unsigned long value = 7;
86 int i;
87
88 for (i = 0; i < ARRAY_SIZE(bcm6753_flash_rate); i++) {
89 if (period_ms <= bcm6753_flash_rate[i]) {
90 value = i;
91 break;
92 }
93 }
94
95 return value;
96 }
97
bcm6753_led_set_period(struct udevice * dev,int period_ms)98 static int bcm6753_led_set_period(struct udevice *dev, int period_ms)
99 {
100 struct bcm6753_led_priv *priv = dev_get_priv(dev);
101 u32 offset, shift, value;
102
103 offset = CLED_LED_0_CONFIG_0 + (CLED_CONFIG_SIZE * priv->pin);
104 value = bcm6753_flash_rate_value(period_ms);
105 shift = CLED_CONFIG0_FLASH_CTRL_SHIFT;
106
107 /* set mode steady */
108 clrbits_32(priv->regs + offset, CLED_CONFIG0_MODE_MASK);
109 setbits_32(priv->regs + offset, CLED_CONFIG0_MODE_STEADY);
110
111 /* set flash rate */
112 clrbits_32(priv->regs + offset, CLED_CONFIG0_FLASH_CTRL_MASK);
113 setbits_32(priv->regs + offset, value << shift);
114
115 /* enable config */
116 setbits_32(priv->regs + CLED_LED_CH_ACTIVATE_REG, 1 << priv->pin);
117
118 return 0;
119 }
120
bcm6753_led_get_state(struct udevice * dev)121 static enum led_state_t bcm6753_led_get_state(struct udevice *dev)
122 {
123 struct bcm6753_led_priv *priv = dev_get_priv(dev);
124 enum led_state_t state = LEDST_OFF;
125 u32 sw_led_ip_status;
126
127 sw_led_ip_status = readl(priv->regs + CLED_SW_LED_IP_STATUS_REG);
128 if (sw_led_ip_status & (1 << priv->pin))
129 state = LEDST_ON;
130
131 return state;
132 }
133
bcm6753_led_set_state(struct udevice * dev,enum led_state_t state)134 static int bcm6753_led_set_state(struct udevice *dev, enum led_state_t state)
135 {
136 struct bcm6753_led_priv *priv = dev_get_priv(dev);
137
138 switch (state) {
139 case LEDST_OFF:
140 setbits_32(priv->regs + CLED_SW_LED_IP_CLEAR_REG, (1 << priv->pin));
141 if (IS_ENABLED(CONFIG_LED_BLINK))
142 bcm6753_led_set_period(dev, 0);
143 break;
144 case LEDST_ON:
145 setbits_32(priv->regs + CLED_SW_LED_IP_SET_REG, (1 << priv->pin));
146 if (IS_ENABLED(CONFIG_LED_BLINK))
147 bcm6753_led_set_period(dev, 0);
148 break;
149 case LEDST_TOGGLE:
150 if (bcm6753_led_get_state(dev) == LEDST_OFF)
151 return bcm6753_led_set_state(dev, LEDST_ON);
152 else
153 return bcm6753_led_set_state(dev, LEDST_OFF);
154 break;
155 #ifdef CONFIG_LED_BLINK
156 case LEDST_BLINK:
157 setbits_32(priv->regs + CLED_SW_LED_IP_SET_REG, (1 << priv->pin));
158 break;
159 #endif
160 default:
161 return -EINVAL;
162 }
163
164 return 0;
165 }
166
167 static const struct led_ops bcm6753_led_ops = {
168 .get_state = bcm6753_led_get_state,
169 .set_state = bcm6753_led_set_state,
170 #ifdef CONFIG_LED_BLINK
171 .set_period = bcm6753_led_set_period,
172 #endif
173 };
174
bcm6753_led_probe(struct udevice * dev)175 static int bcm6753_led_probe(struct udevice *dev)
176 {
177 struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
178
179 /* Top-level LED node */
180 if (!uc_plat->label) {
181 void __iomem *regs;
182 u32 set_bits = 0;
183
184 regs = dev_remap_addr(dev);
185 if (!regs)
186 return -EINVAL;
187
188 if (dev_read_bool(dev, "brcm,serial-led-msb-first"))
189 set_bits |= CLED_CTRL_SERIAL_LED_MSB_FIRST;
190 if (dev_read_bool(dev, "brcm,serial-led-en-pol"))
191 set_bits |= CLED_CTRL_SERIAL_LED_EN_POL;
192 if (dev_read_bool(dev, "brcm,serial-led-clk-pol"))
193 set_bits |= CLED_CTRL_SERIAL_LED_CLK_POL;
194 if (dev_read_bool(dev, "brcm,serial-led-data-ppol"))
195 set_bits |= CLED_CTRL_SERIAL_LED_DATA_PPOL;
196
197 clrsetbits_32(regs + CLED_CTRL_REG, CLED_CTRL_MASK, set_bits);
198 } else {
199 struct bcm6753_led_priv *priv = dev_get_priv(dev);
200 void __iomem *regs;
201 unsigned int pin;
202
203 regs = dev_remap_addr(dev_get_parent(dev));
204 if (!regs)
205 return -EINVAL;
206
207 pin = dev_read_u32_default(dev, "reg", LEDS_MAX);
208 if (pin >= LEDS_MAX)
209 return -EINVAL;
210
211 priv->regs = regs;
212 priv->pin = pin;
213
214 /* this led is managed by software */
215 clrbits_32(regs + CLED_HW_LED_EN_REG, 1 << pin);
216
217 /* configure the polarity */
218 if (dev_read_bool(dev, "active-low"))
219 clrbits_32(regs + CLED_PLED_OP_PPOL_REG, 1 << pin);
220 else
221 setbits_32(regs + CLED_PLED_OP_PPOL_REG, 1 << pin);
222 }
223
224 return 0;
225 }
226
bcm6753_led_bind(struct udevice * parent)227 static int bcm6753_led_bind(struct udevice *parent)
228 {
229 ofnode node;
230
231 dev_for_each_subnode(node, parent) {
232 struct udevice *dev;
233 int ret;
234
235 ret = device_bind_driver_to_node(parent, "bcm6753-led",
236 ofnode_get_name(node),
237 node, &dev);
238 if (ret)
239 return ret;
240 }
241
242 return 0;
243 }
244
245 static const struct udevice_id bcm6753_led_ids[] = {
246 { .compatible = "brcm,bcm6753-leds" },
247 { /* sentinel */ }
248 };
249
250 U_BOOT_DRIVER(bcm6753_led) = {
251 .name = "bcm6753-led",
252 .id = UCLASS_LED,
253 .of_match = bcm6753_led_ids,
254 .bind = bcm6753_led_bind,
255 .probe = bcm6753_led_probe,
256 .priv_auto = sizeof(struct bcm6753_led_priv),
257 .ops = &bcm6753_led_ops,
258 };
259