1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Stefan Roese <sr@denx.de>
4 *
5 * Derived from drivers/mtd/nand/spi/micron.c
6 * Copyright (c) 2016-2017 Micron Technology, Inc.
7 */
8
9 #ifndef __UBOOT__
10 #include <malloc.h>
11 #include <linux/device.h>
12 #include <linux/kernel.h>
13 #endif
14 #include <linux/mtd/spinand.h>
15
16 #define SPINAND_MFR_GIGADEVICE 0xC8
17 #define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4)
18 #define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4)
19
20 #define GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS (1 << 4)
21 #define GD5FXGQ5XE_STATUS_ECC_4_BITFLIPS (3 << 4)
22
23 #define GD5FXGQXXEXXG_REG_STATUS2 0xf0
24
25 /* Q4 devices, QUADIO: Dummy bytes valid for 1 and 2 GBit variants */
26 static SPINAND_OP_VARIANTS(gd5fxgq4_read_cache_variants,
27 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
28 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
29 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
30 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
31 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
32 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
33
34 /* Q5 devices, QUADIO: Dummy bytes only valid for 1 GBit variants */
35 static SPINAND_OP_VARIANTS(gd5f1gq5_read_cache_variants,
36 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
37 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
38 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
39 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
40 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
41 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
42
43 static SPINAND_OP_VARIANTS(write_cache_variants,
44 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
45 SPINAND_PROG_LOAD(true, 0, NULL, 0));
46
47 static SPINAND_OP_VARIANTS(update_cache_variants,
48 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
49 SPINAND_PROG_LOAD(false, 0, NULL, 0));
50
gd5fxgqxxexxg_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)51 static int gd5fxgqxxexxg_ooblayout_ecc(struct mtd_info *mtd, int section,
52 struct mtd_oob_region *region)
53 {
54 if (section)
55 return -ERANGE;
56
57 region->offset = 64;
58 region->length = 64;
59
60 return 0;
61 }
62
gd5fxgqxxexxg_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)63 static int gd5fxgqxxexxg_ooblayout_free(struct mtd_info *mtd, int section,
64 struct mtd_oob_region *region)
65 {
66 if (section)
67 return -ERANGE;
68
69 /* Reserve 1 bytes for the BBM. */
70 region->offset = 1;
71 region->length = 63;
72
73 return 0;
74 }
75
gd5fxgq4xexxg_ecc_get_status(struct spinand_device * spinand,u8 status)76 static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
77 u8 status)
78 {
79 u8 status2;
80 struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
81 &status2);
82 int ret;
83
84 switch (status & STATUS_ECC_MASK) {
85 case STATUS_ECC_NO_BITFLIPS:
86 return 0;
87
88 case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
89 /*
90 * Read status2 register to determine a more fine grained
91 * bit error status
92 */
93 ret = spi_mem_exec_op(spinand->slave, &op);
94 if (ret)
95 return ret;
96
97 /*
98 * 4 ... 7 bits are flipped (1..4 can't be detected, so
99 * report the maximum of 4 in this case
100 */
101 /* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
102 return ((status & STATUS_ECC_MASK) >> 2) |
103 ((status2 & STATUS_ECC_MASK) >> 4);
104
105 case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
106 return 8;
107
108 case STATUS_ECC_UNCOR_ERROR:
109 return -EBADMSG;
110
111 default:
112 break;
113 }
114
115 return -EINVAL;
116 }
117
gd5fxgq5xexxg_ecc_get_status(struct spinand_device * spinand,u8 status)118 static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
119 u8 status)
120 {
121 u8 status2;
122 struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
123 &status2);
124 int ret;
125
126 switch (status & STATUS_ECC_MASK) {
127 case STATUS_ECC_NO_BITFLIPS:
128 return 0;
129
130 case GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS:
131 /*
132 * Read status2 register to determine a more fine grained
133 * bit error status
134 */
135 ret = spi_mem_exec_op(spinand->slave, &op);
136 if (ret)
137 return ret;
138
139 /*
140 * 1 ... 4 bits are flipped (and corrected)
141 */
142 /* bits sorted this way (1...0): ECCSE1, ECCSE0 */
143 return ((status2 & STATUS_ECC_MASK) >> 4) + 1;
144
145 case STATUS_ECC_UNCOR_ERROR:
146 return -EBADMSG;
147
148 default:
149 break;
150 }
151
152 return -EINVAL;
153 }
154
155 static const struct mtd_ooblayout_ops gd5fxgqxxexxg_ooblayout = {
156 .ecc = gd5fxgqxxexxg_ooblayout_ecc,
157 .rfree = gd5fxgqxxexxg_ooblayout_free,
158 };
159
160 static const struct spinand_info gigadevice_spinand_table[] = {
161 SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
162 NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
163 NAND_ECCREQ(8, 512),
164 SPINAND_INFO_OP_VARIANTS(&gd5fxgq4_read_cache_variants,
165 &write_cache_variants,
166 &update_cache_variants),
167 0,
168 SPINAND_ECCINFO(&gd5fxgqxxexxg_ooblayout,
169 gd5fxgq4xexxg_ecc_get_status)),
170 SPINAND_INFO("GD5F1GQ5UExxG", 0x51,
171 NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
172 NAND_ECCREQ(4, 512),
173 SPINAND_INFO_OP_VARIANTS(&gd5f1gq5_read_cache_variants,
174 &write_cache_variants,
175 &update_cache_variants),
176 0,
177 SPINAND_ECCINFO(&gd5fxgqxxexxg_ooblayout,
178 gd5fxgq5xexxg_ecc_get_status)),
179 };
180
gigadevice_spinand_detect(struct spinand_device * spinand)181 static int gigadevice_spinand_detect(struct spinand_device *spinand)
182 {
183 u8 *id = spinand->id.data;
184 int ret;
185
186 /*
187 * For GD NANDs, There is an address byte needed to shift in before IDs
188 * are read out, so the first byte in raw_id is dummy.
189 */
190 if (id[1] != SPINAND_MFR_GIGADEVICE)
191 return 0;
192
193 ret = spinand_match_and_init(spinand, gigadevice_spinand_table,
194 ARRAY_SIZE(gigadevice_spinand_table),
195 id[2]);
196 if (ret)
197 return ret;
198
199 return 1;
200 }
201
202 static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {
203 .detect = gigadevice_spinand_detect,
204 };
205
206 const struct spinand_manufacturer gigadevice_spinand_manufacturer = {
207 .id = SPINAND_MFR_GIGADEVICE,
208 .name = "GigaDevice",
209 .ops = &gigadevice_spinand_manuf_ops,
210 };
211