1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2014 Google, Inc
4 *
5 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
6 *
7 * Modifications are:
8 * Copyright (C) 2003-2004 Linux Networx
9 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
11 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12 * Copyright (C) 2005-2006 Tyan
13 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14 * Copyright (C) 2005-2009 coresystems GmbH
15 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 *
17 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 *
19 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
20 * David Mosberger-Tang
21 *
22 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
23 */
24
25 #define LOG_CATEGORY UCLASS_PCI
26
27 #include <common.h>
28 #include <bios_emul.h>
29 #include <bootstage.h>
30 #include <dm.h>
31 #include <errno.h>
32 #include <init.h>
33 #include <log.h>
34 #include <malloc.h>
35 #include <pci.h>
36 #include <pci_rom.h>
37 #include <vesa.h>
38 #include <video.h>
39 #include <acpi/acpi_s3.h>
40 #include <asm/global_data.h>
41 #include <linux/screen_info.h>
42
43 DECLARE_GLOBAL_DATA_PTR;
44
board_should_run_oprom(struct udevice * dev)45 __weak bool board_should_run_oprom(struct udevice *dev)
46 {
47 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
48 if (gd->arch.prev_sleep_state == ACPI_S3) {
49 if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
50 return true;
51 else
52 return false;
53 }
54 #endif
55
56 return true;
57 }
58
board_should_load_oprom(struct udevice * dev)59 __weak bool board_should_load_oprom(struct udevice *dev)
60 {
61 return true;
62 }
63
board_map_oprom_vendev(uint32_t vendev)64 __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
65 {
66 return vendev;
67 }
68
pci_rom_probe(struct udevice * dev,struct pci_rom_header ** hdrp)69 static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
70 {
71 struct pci_child_plat *pplat = dev_get_parent_plat(dev);
72 struct pci_rom_header *rom_header;
73 struct pci_rom_data *rom_data;
74 u16 rom_vendor, rom_device;
75 u32 rom_class;
76 u32 vendev;
77 u32 mapped_vendev;
78 u32 rom_address;
79
80 vendev = pplat->vendor << 16 | pplat->device;
81 mapped_vendev = board_map_oprom_vendev(vendev);
82 if (vendev != mapped_vendev)
83 debug("Device ID mapped to %#08x\n", mapped_vendev);
84
85 #ifdef CONFIG_VGA_BIOS_ADDR
86 rom_address = CONFIG_VGA_BIOS_ADDR;
87 #else
88
89 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
90 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
91 debug("%s: rom_address=%x\n", __func__, rom_address);
92 return -ENOENT;
93 }
94
95 /* Enable expansion ROM address decoding. */
96 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
97 rom_address | PCI_ROM_ADDRESS_ENABLE);
98 #endif
99 debug("Option ROM address %x\n", rom_address);
100 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
101
102 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
103 le16_to_cpu(rom_header->signature),
104 rom_header->size * 512, le16_to_cpu(rom_header->data));
105
106 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
107 printf("Incorrect expansion ROM header signature %04x\n",
108 le16_to_cpu(rom_header->signature));
109 #ifndef CONFIG_VGA_BIOS_ADDR
110 /* Disable expansion ROM address decoding */
111 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
112 #endif
113 return -EINVAL;
114 }
115
116 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
117 rom_vendor = le16_to_cpu(rom_data->vendor);
118 rom_device = le16_to_cpu(rom_data->device);
119
120 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
121 rom_vendor, rom_device);
122
123 /* If the device id is mapped, a mismatch is expected */
124 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
125 (vendev == mapped_vendev)) {
126 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
127 rom_vendor, rom_device);
128 /* Continue anyway */
129 }
130
131 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
132 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
133 rom_class, rom_data->type);
134
135 if (pplat->class != rom_class) {
136 debug("Class Code mismatch ROM %06x, dev %06x\n",
137 rom_class, pplat->class);
138 }
139 *hdrp = rom_header;
140
141 return 0;
142 }
143
144 /**
145 * pci_rom_load() - Load a ROM image and return a pointer to it
146 *
147 * @rom_header: Pointer to ROM image
148 * @ram_headerp: Returns a pointer to the image in RAM
149 * @allocedp: Returns true if @ram_headerp was allocated and needs
150 * to be freed
151 * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
152 * the error state. Even if this function returns an error, it may have
153 * allocated memory.
154 */
pci_rom_load(struct pci_rom_header * rom_header,struct pci_rom_header ** ram_headerp,bool * allocedp)155 static int pci_rom_load(struct pci_rom_header *rom_header,
156 struct pci_rom_header **ram_headerp, bool *allocedp)
157 {
158 struct pci_rom_data *rom_data;
159 unsigned int rom_size;
160 unsigned int image_size = 0;
161 void *target;
162
163 *allocedp = false;
164 do {
165 /* Get next image, until we see an x86 version */
166 rom_header = (struct pci_rom_header *)((void *)rom_header +
167 image_size);
168
169 rom_data = (struct pci_rom_data *)((void *)rom_header +
170 le16_to_cpu(rom_header->data));
171
172 image_size = le16_to_cpu(rom_data->ilen) * 512;
173 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
174
175 if (rom_data->type != 0)
176 return -EACCES;
177
178 rom_size = rom_header->size * 512;
179
180 #ifdef PCI_VGA_RAM_IMAGE_START
181 target = (void *)PCI_VGA_RAM_IMAGE_START;
182 #else
183 target = (void *)malloc(rom_size);
184 if (!target)
185 return -ENOMEM;
186 *allocedp = true;
187 #endif
188 if (target != rom_header) {
189 ulong start = get_timer(0);
190
191 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
192 rom_header, target, rom_size);
193 memcpy(target, rom_header, rom_size);
194 if (memcmp(target, rom_header, rom_size)) {
195 printf("VGA ROM copy failed\n");
196 return -EFAULT;
197 }
198 debug("Copy took %lums\n", get_timer(start));
199 }
200 *ram_headerp = target;
201
202 return 0;
203 }
204
205 struct vesa_state mode_info;
206
setup_video(struct screen_info * screen_info)207 void setup_video(struct screen_info *screen_info)
208 {
209 struct vesa_mode_info *vesa = &mode_info.vesa;
210
211 /* Sanity test on VESA parameters */
212 if (!vesa->x_resolution || !vesa->y_resolution)
213 return;
214
215 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
216
217 screen_info->lfb_width = vesa->x_resolution;
218 screen_info->lfb_height = vesa->y_resolution;
219 screen_info->lfb_depth = vesa->bits_per_pixel;
220 screen_info->lfb_linelength = vesa->bytes_per_scanline;
221 screen_info->lfb_base = vesa->phys_base_ptr;
222 screen_info->lfb_size =
223 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
224 65536);
225 screen_info->lfb_size >>= 16;
226 screen_info->red_size = vesa->red_mask_size;
227 screen_info->red_pos = vesa->red_mask_pos;
228 screen_info->green_size = vesa->green_mask_size;
229 screen_info->green_pos = vesa->green_mask_pos;
230 screen_info->blue_size = vesa->blue_mask_size;
231 screen_info->blue_pos = vesa->blue_mask_pos;
232 screen_info->rsvd_size = vesa->reserved_mask_size;
233 screen_info->rsvd_pos = vesa->reserved_mask_pos;
234 }
235
dm_pci_run_vga_bios(struct udevice * dev,int (* int15_handler)(void),int exec_method)236 int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
237 int exec_method)
238 {
239 struct pci_child_plat *pplat = dev_get_parent_plat(dev);
240 struct pci_rom_header *rom = NULL, *ram = NULL;
241 int vesa_mode = -1;
242 bool emulate, alloced;
243 int ret;
244
245 /* Only execute VGA ROMs */
246 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
247 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
248 PCI_CLASS_DISPLAY_VGA);
249 return -ENODEV;
250 }
251
252 if (!board_should_load_oprom(dev))
253 return log_msg_ret("Should not load OPROM", -ENXIO);
254
255 ret = pci_rom_probe(dev, &rom);
256 if (ret)
257 return ret;
258
259 ret = pci_rom_load(rom, &ram, &alloced);
260 if (ret)
261 goto err;
262
263 if (!board_should_run_oprom(dev)) {
264 ret = -ENXIO;
265 goto err;
266 }
267
268 #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
269 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
270 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
271 #endif
272 debug("Selected vesa mode %#x\n", vesa_mode);
273
274 if (exec_method & PCI_ROM_USE_NATIVE) {
275 #ifdef CONFIG_X86
276 emulate = false;
277 #else
278 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
279 printf("BIOS native execution is only available on x86\n");
280 ret = -ENOSYS;
281 goto err;
282 }
283 emulate = true;
284 #endif
285 } else {
286 #ifdef CONFIG_BIOSEMU
287 emulate = true;
288 #else
289 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
290 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
291 ret = -ENOSYS;
292 goto err;
293 }
294 emulate = false;
295 #endif
296 }
297
298 if (emulate) {
299 #ifdef CONFIG_BIOSEMU
300 BE_VGAInfo *info;
301
302 ret = biosemu_setup(dev, &info);
303 if (ret)
304 goto err;
305 biosemu_set_interrupt_handler(0x15, int15_handler);
306 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
307 true, vesa_mode, &mode_info);
308 if (ret)
309 goto err;
310 #endif
311 } else {
312 #if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
313 bios_set_interrupt_handler(0x15, int15_handler);
314
315 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
316 &mode_info);
317 #endif
318 }
319 debug("Final vesa mode %#x\n", mode_info.video_mode);
320 ret = 0;
321
322 err:
323 if (alloced)
324 free(ram);
325 return ret;
326 }
327
vesa_setup_video_priv(struct vesa_mode_info * vesa,u64 fb,struct video_priv * uc_priv,struct video_uc_plat * plat)328 int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
329 struct video_priv *uc_priv,
330 struct video_uc_plat *plat)
331 {
332 if (!vesa->x_resolution)
333 return log_msg_ret("No x resolution", -ENXIO);
334 uc_priv->xsize = vesa->x_resolution;
335 uc_priv->ysize = vesa->y_resolution;
336 uc_priv->line_length = vesa->bytes_per_scanline;
337 switch (vesa->bits_per_pixel) {
338 case 32:
339 case 24:
340 uc_priv->bpix = VIDEO_BPP32;
341 break;
342 case 16:
343 uc_priv->bpix = VIDEO_BPP16;
344 break;
345 default:
346 return -EPROTONOSUPPORT;
347 }
348
349 /* Use double buffering if enabled */
350 if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
351 plat->copy_base = fb;
352 else
353 plat->base = fb;
354 log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
355 plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
356
357 return 0;
358 }
359
vesa_setup_video(struct udevice * dev,int (* int15_handler)(void))360 int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void))
361 {
362 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
363 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
364 int ret;
365
366 /* If we are running from EFI or coreboot, this can't work */
367 if (!ll_boot_init()) {
368 printf("Not available (previous bootloader prevents it)\n");
369 return -EPERM;
370 }
371 bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
372 ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
373 PCI_ROM_ALLOW_FALLBACK);
374 bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
375 if (ret) {
376 debug("failed to run video BIOS: %d\n", ret);
377 return ret;
378 }
379
380 ret = vesa_setup_video_priv(&mode_info.vesa,
381 mode_info.vesa.phys_base_ptr, uc_priv,
382 plat);
383 if (ret) {
384 if (ret == -ENFILE) {
385 /*
386 * See video-uclass.c for how to set up reserved memory
387 * in your video driver
388 */
389 log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
390 dev->driver->name);
391 }
392
393 debug("No video mode configured\n");
394 return ret;
395 }
396
397 printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
398 mode_info.vesa.bits_per_pixel);
399
400 return 0;
401 }
402