1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2019-2021 NXP
4 *
5 * PCIe DT fixup for NXP Layerscape SoCs
6 * Author: Wasim Khan <wasim.khan@nxp.com>
7 *
8 */
9
10 #include <common.h>
11 #include <init.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/soc.h>
14 #include <linux/libfdt.h>
15 #include <fdt_support.h>
16 #include "pcie_layerscape_fixup_common.h"
17
18 extern int next_stream_id;
19
ft_pci_setup(void * blob,struct bd_info * bd)20 void ft_pci_setup(void *blob, struct bd_info *bd)
21 {
22 #if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
23 uint svr;
24
25 svr = SVR_SOC_VER(get_svr());
26
27 if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
28 ft_pci_setup_ls_gen4(blob, bd);
29 else
30 #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
31 ft_pci_setup_ls(blob, bd);
32 }
33
34 #if defined(CONFIG_FSL_LAYERSCAPE)
lx2_board_fix_fdt(void * fdt)35 static int lx2_board_fix_fdt(void *fdt)
36 {
37 char *reg_name, *old_str, *new_str;
38 const char *reg_names;
39 int names_len, old_str_len, new_str_len, remaining_str_len;
40 struct str_map {
41 char *old_str;
42 char *new_str;
43 } reg_names_map[] = {
44 { "csr_axi_slave", "regs" },
45 { "config_axi_slave", "config" }
46 };
47 int off = -1, i;
48 const fdt32_t *prop;
49 u32 ob_wins, ib_wins;
50
51 fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie") {
52 fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
53 strlen("fsl,ls2088a-pcie") + 1);
54
55 reg_names = fdt_getprop(fdt, off, "reg-names", &names_len);
56 if (!reg_names)
57 continue;
58 reg_name = (char *)reg_names;
59 remaining_str_len = names_len - (reg_name - reg_names);
60 i = 0;
61 while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
62 old_str = reg_names_map[i].old_str;
63 new_str = reg_names_map[i].new_str;
64 old_str_len = strlen(old_str);
65 new_str_len = strlen(new_str);
66 if (memcmp(reg_name, old_str, old_str_len) == 0) {
67 /* first only leave required bytes for new_str
68 * and copy rest of the string after it
69 */
70 memcpy(reg_name + new_str_len,
71 reg_name + old_str_len,
72 remaining_str_len - old_str_len);
73
74 /* Now copy new_str */
75 memcpy(reg_name, new_str, new_str_len);
76 names_len -= old_str_len;
77 names_len += new_str_len;
78 i++;
79 }
80
81 reg_name = memchr(reg_name, '\0', remaining_str_len);
82 if (!reg_name)
83 break;
84 reg_name += 1;
85
86 remaining_str_len = names_len - (reg_name - reg_names);
87 }
88 fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
89 fdt_delprop(fdt, off, "apio-wins");
90 fdt_delprop(fdt, off, "ppio-wins");
91 }
92
93 /* Fixup PCIe EP nodes */
94 fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie-ep") {
95 fdt_setprop_string(fdt, off, "compatible",
96 "fsl,lx2160ar2-pcie-ep");
97 prop = fdt_getprop(fdt, off, "apio-wins", NULL);
98 if (!prop) {
99 printf("%s: Failed to fixup PCIe EP node @0x%x\n",
100 __func__, off);
101 off = fdt_node_offset_by_compatible(fdt, off,
102 "fsl,lx2160a-pcie-ep");
103 continue;
104 }
105
106 ob_wins = fdt32_to_cpu(*prop);
107 ib_wins = (ob_wins == 256) ? 24 : 8;
108 fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins);
109 fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins);
110 fdt_delprop(fdt, off, "apio-wins");
111 }
112
113 return 0;
114 }
115
pcie_board_fix_fdt(void * fdt)116 int pcie_board_fix_fdt(void *fdt)
117 {
118 uint svr;
119
120 svr = SVR_SOC_VER(get_svr());
121
122 if ((svr == SVR_LX2160A || svr == SVR_LX2162A ||
123 svr == SVR_LX2120A || svr == SVR_LX2080A ||
124 svr == SVR_LX2122A || svr == SVR_LX2082A) &&
125 IS_SVR_REV(get_svr(), 2, 0))
126 return lx2_board_fix_fdt(fdt);
127
128 return 0;
129 }
130
131 #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
132 /* returns the next available streamid for pcie, -errno if failed */
pcie_next_streamid(int currentid,int idx)133 int pcie_next_streamid(int currentid, int idx)
134 {
135 if (currentid > FSL_PEX_STREAM_ID_END)
136 return -EINVAL;
137
138 return currentid | ((idx + 1) << 11);
139 }
140 #else
141 /* returns the next available streamid for pcie, -errno if failed */
pcie_next_streamid(int currentid,int idx)142 int pcie_next_streamid(int currentid, int idx)
143 {
144 if (next_stream_id > FSL_PEX_STREAM_ID_END)
145 return -EINVAL;
146
147 return next_stream_id++;
148 }
149 #endif
150 #endif /* CONFIG_FSL_LAYERSCAPE */
151