1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 *
5 * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
6 * based on Linux driver : pinctrl/pinctrl-stmfx.c
7 */
8
9 #define LOG_CATEGORY UCLASS_PINCTRL
10
11 #include <common.h>
12 #include <dm.h>
13 #include <log.h>
14 #include <i2c.h>
15 #include <asm/gpio.h>
16 #include <dm/device.h>
17 #include <dm/device-internal.h>
18 #include <dm/device_compat.h>
19 #include <dm/lists.h>
20 #include <dm/pinctrl.h>
21 #include <linux/bitfield.h>
22 #include <linux/bitops.h>
23 #include <linux/delay.h>
24 #include <power/regulator.h>
25
26 /* STMFX pins = GPIO[15:0] + aGPIO[7:0] */
27 #define STMFX_MAX_GPIO 16
28 #define STMFX_MAX_AGPIO 8
29
30 /* General */
31 #define STMFX_REG_CHIP_ID 0x00 /* R */
32 #define STMFX_REG_FW_VERSION_MSB 0x01 /* R */
33 #define STMFX_REG_FW_VERSION_LSB 0x02 /* R */
34 #define STMFX_REG_SYS_CTRL 0x40 /* RW */
35
36 /* MFX boot time is around 10ms, so after reset, we have to wait this delay */
37 #define STMFX_BOOT_TIME_MS 10
38
39 /* GPIOs expander */
40 /* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
41 #define STMFX_REG_GPIO_STATE 0x10 /* R */
42 /* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
43 #define STMFX_REG_GPIO_DIR 0x60 /* RW */
44 /* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
45 #define STMFX_REG_GPIO_TYPE 0x64 /* RW */
46 /* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
47 #define STMFX_REG_GPIO_PUPD 0x68 /* RW */
48 /* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
49 #define STMFX_REG_GPO_SET 0x6C /* RW */
50 /* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
51 #define STMFX_REG_GPO_CLR 0x70 /* RW */
52
53 /* STMFX_REG_CHIP_ID bitfields */
54 #define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
55
56 /* STMFX_REG_SYS_CTRL bitfields */
57 #define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
58 #define STMFX_REG_SYS_CTRL_ALTGPIO_EN BIT(3)
59 #define STMFX_REG_SYS_CTRL_SWRST BIT(7)
60
61 #define NR_GPIO_REGS 3
62 #define NR_GPIOS_PER_REG 8
63 #define get_reg(offset) ((offset) / NR_GPIOS_PER_REG)
64 #define get_shift(offset) ((offset) % NR_GPIOS_PER_REG)
65 #define get_mask(offset) (BIT(get_shift(offset)))
66
67 struct stmfx_pinctrl {
68 struct udevice *gpio;
69 };
70
stmfx_read(struct udevice * dev,uint offset)71 static int stmfx_read(struct udevice *dev, uint offset)
72 {
73 return dm_i2c_reg_read(dev_get_parent(dev), offset);
74 }
75
stmfx_write(struct udevice * dev,uint offset,unsigned int val)76 static int stmfx_write(struct udevice *dev, uint offset, unsigned int val)
77 {
78 return dm_i2c_reg_write(dev_get_parent(dev), offset, val);
79 }
80
stmfx_read_reg(struct udevice * dev,u8 reg_base,uint offset)81 static int stmfx_read_reg(struct udevice *dev, u8 reg_base, uint offset)
82 {
83 u8 reg = reg_base + get_reg(offset);
84 u32 mask = get_mask(offset);
85 int ret;
86
87 ret = stmfx_read(dev, reg);
88 if (ret < 0)
89 return ret;
90
91 return ret < 0 ? ret : !!(ret & mask);
92 }
93
stmfx_write_reg(struct udevice * dev,u8 reg_base,uint offset,uint val)94 static int stmfx_write_reg(struct udevice *dev, u8 reg_base, uint offset,
95 uint val)
96 {
97 u8 reg = reg_base + get_reg(offset);
98 u32 mask = get_mask(offset);
99 int ret;
100
101 ret = stmfx_read(dev, reg);
102 if (ret < 0)
103 return ret;
104 ret = (ret & ~mask) | (val ? mask : 0);
105
106 return stmfx_write(dev, reg, ret);
107 }
108
stmfx_conf_set_pupd(struct udevice * dev,unsigned int offset,uint pupd)109 static int stmfx_conf_set_pupd(struct udevice *dev, unsigned int offset,
110 uint pupd)
111 {
112 return stmfx_write_reg(dev, STMFX_REG_GPIO_PUPD, offset, pupd);
113 }
114
stmfx_conf_get_pupd(struct udevice * dev,unsigned int offset)115 static int stmfx_conf_get_pupd(struct udevice *dev, unsigned int offset)
116 {
117 return stmfx_read_reg(dev, STMFX_REG_GPIO_PUPD, offset);
118 }
119
stmfx_conf_set_type(struct udevice * dev,unsigned int offset,uint type)120 static int stmfx_conf_set_type(struct udevice *dev, unsigned int offset,
121 uint type)
122 {
123 return stmfx_write_reg(dev, STMFX_REG_GPIO_TYPE, offset, type);
124 }
125
stmfx_conf_get_type(struct udevice * dev,unsigned int offset)126 static int stmfx_conf_get_type(struct udevice *dev, unsigned int offset)
127 {
128 return stmfx_read_reg(dev, STMFX_REG_GPIO_TYPE, offset);
129 }
130
stmfx_gpio_get(struct udevice * dev,unsigned int offset)131 static int stmfx_gpio_get(struct udevice *dev, unsigned int offset)
132 {
133 return stmfx_read_reg(dev, STMFX_REG_GPIO_STATE, offset);
134 }
135
stmfx_gpio_set(struct udevice * dev,unsigned int offset,int value)136 static int stmfx_gpio_set(struct udevice *dev, unsigned int offset, int value)
137 {
138 u32 reg = value ? STMFX_REG_GPO_SET : STMFX_REG_GPO_CLR;
139 u32 mask = get_mask(offset);
140
141 return stmfx_write(dev, reg + get_reg(offset), mask);
142 }
143
stmfx_gpio_get_function(struct udevice * dev,unsigned int offset)144 static int stmfx_gpio_get_function(struct udevice *dev, unsigned int offset)
145 {
146 int ret = stmfx_read_reg(dev, STMFX_REG_GPIO_DIR, offset);
147
148 if (ret < 0)
149 return ret;
150 /* On stmfx, gpio pins direction is (0)input, (1)output. */
151
152 return ret ? GPIOF_OUTPUT : GPIOF_INPUT;
153 }
154
stmfx_gpio_direction_input(struct udevice * dev,unsigned int offset)155 static int stmfx_gpio_direction_input(struct udevice *dev, unsigned int offset)
156 {
157 return stmfx_write_reg(dev, STMFX_REG_GPIO_DIR, offset, 0);
158 }
159
stmfx_gpio_direction_output(struct udevice * dev,unsigned int offset,int value)160 static int stmfx_gpio_direction_output(struct udevice *dev,
161 unsigned int offset, int value)
162 {
163 int ret = stmfx_gpio_set(dev, offset, value);
164 if (ret < 0)
165 return ret;
166
167 return stmfx_write_reg(dev, STMFX_REG_GPIO_DIR, offset, 1);
168 }
169
stmfx_gpio_set_flags(struct udevice * dev,unsigned int offset,ulong flags)170 static int stmfx_gpio_set_flags(struct udevice *dev, unsigned int offset,
171 ulong flags)
172 {
173 int ret = -ENOTSUPP;
174
175 if (flags & GPIOD_IS_OUT) {
176 bool value = flags & GPIOD_IS_OUT_ACTIVE;
177
178 if (flags & GPIOD_OPEN_SOURCE)
179 return -ENOTSUPP;
180 if (flags & GPIOD_OPEN_DRAIN)
181 ret = stmfx_conf_set_type(dev, offset, 0);
182 else /* PUSH-PULL */
183 ret = stmfx_conf_set_type(dev, offset, 1);
184 if (ret)
185 return ret;
186 ret = stmfx_gpio_direction_output(dev, offset, value);
187 } else if (flags & GPIOD_IS_IN) {
188 ret = stmfx_gpio_direction_input(dev, offset);
189 if (ret)
190 return ret;
191 if (flags & GPIOD_PULL_UP) {
192 ret = stmfx_conf_set_type(dev, offset, 1);
193 if (ret)
194 return ret;
195 ret = stmfx_conf_set_pupd(dev, offset, 1);
196 } else if (flags & GPIOD_PULL_DOWN) {
197 ret = stmfx_conf_set_type(dev, offset, 1);
198 if (ret)
199 return ret;
200 ret = stmfx_conf_set_pupd(dev, offset, 0);
201 }
202 }
203
204 return ret;
205 }
206
stmfx_gpio_get_flags(struct udevice * dev,unsigned int offset,ulong * flagsp)207 static int stmfx_gpio_get_flags(struct udevice *dev, unsigned int offset,
208 ulong *flagsp)
209 {
210 ulong dir_flags = 0;
211 int ret;
212
213 if (stmfx_gpio_get_function(dev, offset) == GPIOF_OUTPUT) {
214 dir_flags |= GPIOD_IS_OUT;
215 ret = stmfx_conf_get_type(dev, offset);
216 if (ret < 0)
217 return ret;
218 if (ret == 0)
219 dir_flags |= GPIOD_OPEN_DRAIN;
220 /* 1 = push-pull (default), open source not supported */
221 ret = stmfx_gpio_get(dev, offset);
222 if (ret < 0)
223 return ret;
224 if (ret)
225 dir_flags |= GPIOD_IS_OUT_ACTIVE;
226 } else {
227 dir_flags |= GPIOD_IS_IN;
228 ret = stmfx_conf_get_type(dev, offset);
229 if (ret < 0)
230 return ret;
231 if (ret == 1) {
232 ret = stmfx_conf_get_pupd(dev, offset);
233 if (ret < 0)
234 return ret;
235 if (ret == 1)
236 dir_flags |= GPIOD_PULL_UP;
237 else
238 dir_flags |= GPIOD_PULL_DOWN;
239 }
240 }
241 *flagsp = dir_flags;
242
243 return 0;
244 }
245
stmfx_gpio_probe(struct udevice * dev)246 static int stmfx_gpio_probe(struct udevice *dev)
247 {
248 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
249 struct ofnode_phandle_args args;
250 u8 sys_ctrl;
251
252 uc_priv->bank_name = "stmfx";
253 uc_priv->gpio_count = STMFX_MAX_GPIO + STMFX_MAX_AGPIO;
254 if (!dev_read_phandle_with_args(dev, "gpio-ranges",
255 NULL, 3, 0, &args)) {
256 uc_priv->gpio_count = args.args[2];
257 }
258
259 /* enable GPIO function */
260 sys_ctrl = STMFX_REG_SYS_CTRL_GPIO_EN;
261 if (uc_priv->gpio_count > STMFX_MAX_GPIO)
262 sys_ctrl |= STMFX_REG_SYS_CTRL_ALTGPIO_EN;
263 stmfx_write(dev, STMFX_REG_SYS_CTRL, sys_ctrl);
264
265 return 0;
266 }
267
268 static const struct dm_gpio_ops stmfx_gpio_ops = {
269 .set_value = stmfx_gpio_set,
270 .get_value = stmfx_gpio_get,
271 .get_function = stmfx_gpio_get_function,
272 .direction_input = stmfx_gpio_direction_input,
273 .direction_output = stmfx_gpio_direction_output,
274 .set_flags = stmfx_gpio_set_flags,
275 .get_flags = stmfx_gpio_get_flags,
276 };
277
278 U_BOOT_DRIVER(stmfx_gpio) = {
279 .name = "stmfx-gpio",
280 .id = UCLASS_GPIO,
281 .probe = stmfx_gpio_probe,
282 .ops = &stmfx_gpio_ops,
283 };
284
285 #if CONFIG_IS_ENABLED(PINCONF)
286 static const struct pinconf_param stmfx_pinctrl_conf_params[] = {
287 { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
288 { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 0 },
289 { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 0 },
290 { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 0 },
291 { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
292 { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
293 { "output-high", PIN_CONFIG_OUTPUT, 1 },
294 { "output-low", PIN_CONFIG_OUTPUT, 0 },
295 };
296
stmfx_pinctrl_conf_set(struct udevice * dev,unsigned int pin,unsigned int param,unsigned int arg)297 static int stmfx_pinctrl_conf_set(struct udevice *dev, unsigned int pin,
298 unsigned int param, unsigned int arg)
299 {
300 int ret, dir;
301 struct stmfx_pinctrl *plat = dev_get_plat(dev);
302
303 dir = stmfx_gpio_get_function(plat->gpio, pin);
304
305 if (dir < 0)
306 return dir;
307
308 switch (param) {
309 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
310 case PIN_CONFIG_BIAS_DISABLE:
311 case PIN_CONFIG_DRIVE_PUSH_PULL:
312 ret = stmfx_conf_set_type(dev, pin, 0);
313 break;
314 case PIN_CONFIG_BIAS_PULL_DOWN:
315 ret = stmfx_conf_set_type(dev, pin, 1);
316 if (ret)
317 return ret;
318 ret = stmfx_conf_set_pupd(dev, pin, 0);
319 break;
320 case PIN_CONFIG_BIAS_PULL_UP:
321 ret = stmfx_conf_set_type(dev, pin, 1);
322 if (ret)
323 return ret;
324 ret = stmfx_conf_set_pupd(dev, pin, 1);
325 break;
326 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
327 ret = stmfx_conf_set_type(dev, pin, 1);
328 break;
329 case PIN_CONFIG_OUTPUT:
330 ret = stmfx_gpio_direction_output(plat->gpio, pin, arg);
331 break;
332 default:
333 return -ENOTSUPP;
334 }
335
336 return ret;
337 }
338 #endif
339
stmfx_pinctrl_get_pins_count(struct udevice * dev)340 static int stmfx_pinctrl_get_pins_count(struct udevice *dev)
341 {
342 struct stmfx_pinctrl *plat = dev_get_plat(dev);
343 struct gpio_dev_priv *uc_priv;
344
345 uc_priv = dev_get_uclass_priv(plat->gpio);
346
347 return uc_priv->gpio_count;
348 }
349
350 /*
351 * STMFX pins[15:0] are called "gpio[15:0]"
352 * and STMFX pins[23:16] are called "agpio[7:0]"
353 */
354 static char pin_name[PINNAME_SIZE];
stmfx_pinctrl_get_pin_name(struct udevice * dev,unsigned int selector)355 static const char *stmfx_pinctrl_get_pin_name(struct udevice *dev,
356 unsigned int selector)
357 {
358 if (selector < STMFX_MAX_GPIO)
359 snprintf(pin_name, PINNAME_SIZE, "gpio%u", selector);
360 else
361 snprintf(pin_name, PINNAME_SIZE, "agpio%u", selector - 16);
362 return pin_name;
363 }
364
stmfx_pinctrl_get_pin_conf(struct udevice * dev,unsigned int pin,int func)365 static const char *stmfx_pinctrl_get_pin_conf(struct udevice *dev,
366 unsigned int pin, int func)
367 {
368 int pupd, type;
369
370 type = stmfx_conf_get_type(dev, pin);
371 if (type < 0)
372 return "";
373
374 if (func == GPIOF_OUTPUT) {
375 if (type)
376 return "drive-open-drain";
377 else
378 return ""; /* default: push-pull*/
379 }
380 if (!type)
381 return ""; /* default: bias-disable*/
382
383 pupd = stmfx_conf_get_pupd(dev, pin);
384 if (pupd < 0)
385 return "";
386
387 if (pupd)
388 return "bias-pull-up";
389 else
390 return "bias-pull-down";
391 }
392
stmfx_pinctrl_get_pin_muxing(struct udevice * dev,unsigned int selector,char * buf,int size)393 static int stmfx_pinctrl_get_pin_muxing(struct udevice *dev,
394 unsigned int selector,
395 char *buf, int size)
396 {
397 struct stmfx_pinctrl *plat = dev_get_plat(dev);
398 int func;
399
400 func = stmfx_gpio_get_function(plat->gpio, selector);
401 if (func < 0)
402 return func;
403
404 snprintf(buf, size, "%s ", func == GPIOF_INPUT ? "input" : "output");
405
406 strncat(buf, stmfx_pinctrl_get_pin_conf(dev, selector, func), size);
407
408 return 0;
409 }
410
stmfx_pinctrl_bind(struct udevice * dev)411 static int stmfx_pinctrl_bind(struct udevice *dev)
412 {
413 struct stmfx_pinctrl *plat = dev_get_plat(dev);
414
415 /* subnode name is not explicit: use father name */
416 device_set_name(dev, dev->parent->name);
417
418 return device_bind_driver_to_node(dev->parent,
419 "stmfx-gpio", dev->parent->name,
420 dev_ofnode(dev), &plat->gpio);
421 };
422
stmfx_pinctrl_probe(struct udevice * dev)423 static int stmfx_pinctrl_probe(struct udevice *dev)
424 {
425 struct stmfx_pinctrl *plat = dev_get_plat(dev);
426
427 return device_probe(plat->gpio);
428 };
429
430 const struct pinctrl_ops stmfx_pinctrl_ops = {
431 .get_pins_count = stmfx_pinctrl_get_pins_count,
432 .get_pin_name = stmfx_pinctrl_get_pin_name,
433 .set_state = pinctrl_generic_set_state,
434 .get_pin_muxing = stmfx_pinctrl_get_pin_muxing,
435 #if CONFIG_IS_ENABLED(PINCONF)
436 .pinconf_set = stmfx_pinctrl_conf_set,
437 .pinconf_num_params = ARRAY_SIZE(stmfx_pinctrl_conf_params),
438 .pinconf_params = stmfx_pinctrl_conf_params,
439 #endif
440 };
441
442 static const struct udevice_id stmfx_pinctrl_match[] = {
443 { .compatible = "st,stmfx-0300-pinctrl", },
444 };
445
446 U_BOOT_DRIVER(stmfx_pinctrl) = {
447 .name = "stmfx-pinctrl",
448 .id = UCLASS_PINCTRL,
449 .of_match = of_match_ptr(stmfx_pinctrl_match),
450 .bind = stmfx_pinctrl_bind,
451 .probe = stmfx_pinctrl_probe,
452 .ops = &stmfx_pinctrl_ops,
453 .plat_auto = sizeof(struct stmfx_pinctrl),
454 };
455
stmfx_chip_init(struct udevice * dev)456 static int stmfx_chip_init(struct udevice *dev)
457 {
458 u8 id;
459 u8 version[2];
460 int ret;
461 struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
462
463 ret = dm_i2c_reg_read(dev, STMFX_REG_CHIP_ID);
464 if (ret < 0) {
465 dev_err(dev, "error reading chip id: %d\n", ret);
466 return ret;
467 }
468 id = (u8)ret;
469 /*
470 * Check that ID is the complement of the I2C address:
471 * STMFX I2C address follows the 7-bit format (MSB), that's why
472 * client->addr is shifted.
473 *
474 * STMFX_I2C_ADDR| STMFX | Linux
475 * input pin | I2C device address | I2C device address
476 *---------------------------------------------------------
477 * 0 | b: 1000 010x h:0x84 | 0x42
478 * 1 | b: 1000 011x h:0x86 | 0x43
479 */
480 if (FIELD_GET(STMFX_REG_CHIP_ID_MASK, ~id) != (chip->chip_addr << 1)) {
481 dev_err(dev, "unknown chip id: %#x\n", id);
482 return -EINVAL;
483 }
484
485 ret = dm_i2c_read(dev, STMFX_REG_FW_VERSION_MSB,
486 version, sizeof(version));
487 if (ret) {
488 dev_err(dev, "error reading fw version: %d\n", ret);
489 return ret;
490 }
491
492 dev_info(dev, "STMFX id: %#x, fw version: %x.%02x\n",
493 id, version[0], version[1]);
494
495 ret = dm_i2c_reg_read(dev, STMFX_REG_SYS_CTRL);
496
497 if (ret < 0)
498 return ret;
499
500 ret = dm_i2c_reg_write(dev, STMFX_REG_SYS_CTRL,
501 ret | STMFX_REG_SYS_CTRL_SWRST);
502 if (ret)
503 return ret;
504
505 mdelay(STMFX_BOOT_TIME_MS);
506
507 return ret;
508 }
509
stmfx_probe(struct udevice * dev)510 static int stmfx_probe(struct udevice *dev)
511 {
512 struct udevice *vdd;
513 int ret;
514
515 ret = device_get_supply_regulator(dev, "vdd-supply", &vdd);
516 if (ret && ret != -ENOENT) {
517 dev_err(dev, "vdd regulator error:%d\n", ret);
518 return ret;
519 }
520 if (!ret) {
521 ret = regulator_set_enable(vdd, true);
522 if (ret) {
523 dev_err(dev, "vdd enable failed: %d\n", ret);
524 return ret;
525 }
526 }
527
528 return stmfx_chip_init(dev);
529 }
530
531 static const struct udevice_id stmfx_match[] = {
532 { .compatible = "st,stmfx-0300", },
533 };
534
535 U_BOOT_DRIVER(stmfx) = {
536 .name = "stmfx",
537 .id = UCLASS_I2C_GENERIC,
538 .of_match = of_match_ptr(stmfx_match),
539 .probe = stmfx_probe,
540 .bind = dm_scan_fdt_dev,
541 };
542