1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <ram.h>
9 #include <syscon.h>
10 #include <asm/arch-rockchip/clock.h>
11 #include <asm/arch-rockchip/grf_rk3568.h>
12 #include <asm/arch-rockchip/sdram.h>
13
14 struct dram_info {
15 struct ram_info info;
16 struct rk3568_pmugrf *pmugrf;
17 };
18
rk3568_dmc_probe(struct udevice * dev)19 static int rk3568_dmc_probe(struct udevice *dev)
20 {
21 struct dram_info *priv = dev_get_priv(dev);
22
23 priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
24 priv->info.base = CFG_SYS_SDRAM_BASE;
25 priv->info.size =
26 rockchip_sdram_size((phys_addr_t)&priv->pmugrf->pmu_os_reg2);
27
28 return 0;
29 }
30
rk3568_dmc_get_info(struct udevice * dev,struct ram_info * info)31 static int rk3568_dmc_get_info(struct udevice *dev, struct ram_info *info)
32 {
33 struct dram_info *priv = dev_get_priv(dev);
34
35 *info = priv->info;
36
37 return 0;
38 }
39
40 static struct ram_ops rk3568_dmc_ops = {
41 .get_info = rk3568_dmc_get_info,
42 };
43
44 static const struct udevice_id rk3568_dmc_ids[] = {
45 { .compatible = "rockchip,rk3568-dmc" },
46 { }
47 };
48
49 U_BOOT_DRIVER(dmc_rk3568) = {
50 .name = "rockchip_rk3568_dmc",
51 .id = UCLASS_RAM,
52 .of_match = rk3568_dmc_ids,
53 .ops = &rk3568_dmc_ops,
54 .probe = rk3568_dmc_probe,
55 .priv_auto = sizeof(struct dram_info),
56 };
57