1menuconfig SPI 2 bool "SPI Support" 3 help 4 The "Serial Peripheral Interface" is a low level synchronous 5 protocol. Chips that support SPI can have data transfer rates 6 up to several tens of Mbit/sec. Chips are addressed with a 7 controller and a chipselect. Most SPI slaves don't support 8 dynamic device discovery; some are even write-only or read-only. 9 10 SPI is widely used by microcontrollers to talk with sensors, 11 eeprom and flash memory, codecs and various other controller 12 chips, analog to digital (and d-to-a) converters, and more. 13 MMC and SD cards can be accessed using SPI protocol; and for 14 DataFlash cards used in MMC sockets, SPI must always be used. 15 16 SPI is one of a family of similar protocols using a four wire 17 interface (select, clock, data in, data out) including Microwire 18 (half duplex), SSP, SSI, and PSP. This driver framework should 19 work with most such devices and controllers. 20 21if SPI 22 23config DM_SPI 24 bool "Enable Driver Model for SPI drivers" 25 depends on DM 26 help 27 Enable driver model for SPI. The SPI slave interface 28 (spi_setup_slave(), spi_xfer(), etc.) is then implemented by 29 the SPI uclass. Drivers provide methods to access the SPI 30 buses that they control. The uclass interface is defined in 31 include/spi.h. The existing spi_slave structure is attached 32 as 'parent data' to every slave on each bus. Slaves 33 typically use driver-private data instead of extending the 34 spi_slave structure. 35 36config SPI_MEM 37 bool "SPI memory extension" 38 help 39 Enable this option if you want to enable the SPI memory extension. 40 This extension is meant to simplify interaction with SPI memories 41 by providing an high-level interface to send memory-like commands. 42 43config SPI_DIRMAP 44 bool "SPI direct mapping" 45 depends on SPI_MEM 46 help 47 Enable the SPI direct mapping API. Most modern SPI controllers can 48 directly map a SPI memory (or a portion of the SPI memory) in the CPU 49 address space. Most of the time this brings significant performance 50 improvements as it automates the whole process of sending SPI memory 51 operations every time a new region is accessed. 52 53if DM_SPI 54 55config ALTERA_SPI 56 bool "Altera SPI driver" 57 help 58 Enable the Altera SPI driver. This driver can be used to 59 access the SPI NOR flash on platforms embedding this Altera 60 IP core. Please find details on the "Embedded Peripherals IP 61 User Guide" of Altera. 62 63config APPLE_SPI 64 bool "Apple SPI driver" 65 default y if ARCH_APPLE 66 help 67 Enable the Apple SPI driver. This driver can be used to 68 access the SPI flash and keyboard on machines based on Apple SoCs. 69 70config ATCSPI200_SPI 71 bool "Andestech ATCSPI200 SPI driver" 72 help 73 Enable the Andestech ATCSPI200 SPI driver. This driver can be 74 used to access the SPI flash on AE3XX and AE250 platforms embedding 75 this Andestech IP core. 76 77config ATH79_SPI 78 bool "Atheros SPI driver" 79 depends on ARCH_ATH79 80 help 81 Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used 82 to access SPI NOR flash and other SPI peripherals. This driver 83 uses driver model and requires a device tree binding to operate. 84 please refer to doc/device-tree-bindings/spi/spi-ath79.txt. 85 86config ATMEL_QSPI 87 bool "Atmel Quad SPI Controller" 88 depends on ARCH_AT91 89 help 90 Enable the Atmel Quad SPI controller in master mode. This driver 91 does not support generic SPI. The implementation supports only the 92 spi-mem interface. 93 94config ATMEL_SPI 95 bool "Atmel SPI driver" 96 default y if ARCH_AT91 97 help 98 This enables driver for the Atmel SPI Controller, present on 99 many AT91 (ARM) chips. This driver can be used to access 100 the SPI Flash, such as AT25DF321. 101 102config BCM63XX_HSSPI 103 bool "BCM63XX HSSPI driver" 104 depends on (ARCH_BMIPS || BCM6856 || BCM6858 || BCM63158) 105 help 106 Enable the BCM6328 HSSPI driver. This driver can be used to 107 access the SPI NOR flash on platforms embedding this Broadcom 108 SPI core. 109 110config BCM63XX_SPI 111 bool "BCM6348 SPI driver" 112 depends on ARCH_BMIPS 113 help 114 Enable the BCM6348/BCM6358 SPI driver. This driver can be used to 115 access the SPI NOR flash on platforms embedding these Broadcom 116 SPI cores. 117 118config BCMSTB_SPI 119 bool "BCMSTB SPI driver" 120 help 121 Enable the Broadcom set-top box SPI driver. This driver can 122 be used to access the SPI flash on platforms embedding this 123 Broadcom SPI core. 124 125config CORTINA_SFLASH 126 bool "Cortina-Access Serial Flash controller driver" 127 depends on DM_SPI && SPI_MEM 128 help 129 Enable the Cortina-Access Serial Flash controller driver. This driver 130 can be used to access the SPI NOR/NAND flash on platforms embedding this 131 Cortina-Access IP core. 132 133config CADENCE_QSPI 134 bool "Cadence QSPI driver" 135 help 136 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be 137 used to access the SPI NOR flash on platforms embedding this 138 Cadence IP core. 139 140config HAS_CQSPI_REF_CLK 141 bool "Cadence QSPI static reference clock" 142 depends on CADENCE_QSPI 143 144config CQSPI_REF_CLK 145 int "Cadence QSPI reference clock value in Hz" 146 depends on HAS_CQSPI_REF_CLK 147 148config CADENCE_OSPI_VERSAL 149 bool "Configure Versal OSPI" 150 depends on (ARCH_VERSAL || ARCH_VERSAL_NET) && CADENCE_QSPI 151 imply DM_GPIO 152 help 153 This option is used to enable Versal OSPI DMA operations which 154 are used for ospi flash read using cadence qspi controller. 155 156config CF_SPI 157 bool "ColdFire SPI driver" 158 help 159 Enable the ColdFire SPI driver. This driver can be used on 160 some m68k SoCs. 161 162config DAVINCI_SPI 163 bool "Davinci & Keystone SPI driver" 164 depends on ARCH_DAVINCI || ARCH_KEYSTONE 165 help 166 Enable the Davinci SPI driver 167 168config DESIGNWARE_SPI 169 bool "Designware SPI driver" 170 help 171 Enable the Designware SPI driver. This driver can be used to 172 access the SPI NOR flash on platforms embedding this Designware 173 IP core. 174 175config EXYNOS_SPI 176 bool "Samsung Exynos SPI driver" 177 help 178 Enable the Samsung Exynos SPI driver. This driver can be used to 179 access the SPI NOR flash on platforms embedding this Samsung 180 Exynos IP core. 181 182config FSL_DSPI 183 bool "Freescale DSPI driver" 184 help 185 Enable the Freescale DSPI driver. This driver can be used to 186 access the SPI NOR flash and SPI Data flash on platforms embedding 187 this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms 188 use this driver. 189 190config FSL_QSPI 191 bool "Freescale QSPI driver" 192 imply SPI_FLASH_BAR 193 help 194 Enable the Freescale Quad-SPI (QSPI) driver. This driver can be 195 used to access the SPI NOR flash on platforms embedding this 196 Freescale IP core. 197 198config FSL_QSPI_AHB_FULL_MAP 199 bool "Use full AHB memory map space" 200 depends on FSL_QSPI 201 default y if ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_IMX8M 202 help 203 Enable the Freescale QSPI driver to use full AHB memory map space for 204 flash access. 205 206config GXP_SPI 207 bool "SPI driver for GXP" 208 imply SPI_FLASH_BAR 209 help 210 Enable support for SPI on GXP. 211 212config ICH_SPI 213 bool "Intel ICH SPI driver" 214 help 215 Enable the Intel ICH SPI driver. This driver can be used to 216 access the SPI NOR flash on platforms embedding this Intel 217 ICH IP core. 218 219config IPROC_QSPI 220 bool "Broadcom iProc QSPI Flash Controller driver" 221 help 222 Enable Broadcom iProc QSPI Flash Controller driver. 223 This driver can be used to access the SPI NOR flash. 224 225config KIRKWOOD_SPI 226 bool "Marvell Kirkwood SPI Driver" 227 help 228 Enable support for SPI on various Marvell SoCs, such as 229 Kirkwood and Armada 375. 230 231config MESON_SPIFC 232 bool "Amlogic Meson SPI Flash Controller driver" 233 depends on ARCH_MESON 234 help 235 Enable the Amlogic Meson SPI Flash Controller SPIFC) driver. 236 This driver can be used to access the SPI NOR flash chips on 237 Amlogic Meson SoCs. 238 239config MICROCHIP_COREQSPI 240 bool "Microchip FPGA QSPI Controller driver" 241 help 242 Enable the QSPI driver for Microchip FPGA QSPI controllers. 243 This driver can be used on Polarfire SoC. 244 245config MPC8XX_SPI 246 bool "MPC8XX SPI Driver" 247 depends on MPC8xx 248 help 249 Enable support for SPI on MPC8XX 250 251config MPC8XXX_SPI 252 bool "MPC8XXX SPI Driver" 253 help 254 Enable support for SPI on the MPC8XXX PowerPC SoCs. 255 256config MSCC_BB_SPI 257 bool "MSCC bitbang SPI driver" 258 depends on SOC_VCOREIII 259 help 260 Enable MSCC bitbang SPI driver. This driver can be used on 261 MSCC SOCs. 262 263config MT7620_SPI 264 bool "MediaTek MT7620 SPI driver" 265 depends on SOC_MT7620 266 help 267 Enable the MT7620 SPI driver. This driver can be used to access 268 generic SPI devices on MediaTek MT7620 SoC. 269 270config MT7621_SPI 271 bool "MediaTek MT7621 SPI driver" 272 depends on SOC_MT7621 || SOC_MT7628 273 help 274 Enable the MT7621 SPI driver. This driver can be used to access 275 the SPI NOR flash on platforms embedding this Ralink / MediaTek 276 SPI core, like MT7621/7628/7688. 277 278config MTK_SNOR 279 bool "Mediatek SPI-NOR controller driver" 280 depends on SPI_MEM 281 help 282 Enable the Mediatek SPINOR controller driver. This driver has 283 better read/write performance with NOR. 284 285config MTK_SNFI_SPI 286 bool "Mediatek SPI memory controller driver" 287 depends on SPI_MEM 288 help 289 Enable the Mediatek SPI memory controller driver. This driver is 290 originally based on the MediaTek SNFI IP core. It can only be 291 used to access SPI memory devices like SPI-NOR or SPI-NAND on 292 platforms embedding this IP core, like MT7622/M7629. 293 294config MTK_SPIM 295 bool "Mediatek SPI-MEM master controller driver" 296 depends on SPI_MEM 297 help 298 Enable MediaTek SPI-MEM master controller driver. This driver mainly 299 supports SPI flashes. You can use single, dual or quad mode 300 transmission on this controller. 301 302config MVEBU_A3700_SPI 303 bool "Marvell Armada 3700 SPI driver" 304 select CLK_ARMADA_3720 305 help 306 Enable the Marvell Armada 3700 SPI driver. This driver can be 307 used to access the SPI NOR flash on platforms embedding this 308 Marvell IP core. 309 310config MXS_SPI 311 bool "MXS SPI Driver" 312 help 313 Enable the MXS SPI controller driver. This driver can be used 314 on the i.MX23 and i.MX28 SoCs. 315 316config SPI_MXIC 317 bool "Macronix MX25F0A SPI controller" 318 help 319 Enable the Macronix MX25F0A SPI controller driver. This driver 320 can be used to access the SPI flash on platforms embedding 321 this Macronix IP core. 322 323config NPCM_FIU_SPI 324 bool "FIU driver for Nuvoton NPCM SoC" 325 help 326 This enables support for the Flash Interface Unit SPI controller 327 in master mode. 328 329config NPCM_PSPI 330 bool "PSPI driver for Nuvoton NPCM SoC" 331 help 332 PSPI driver for NPCM SoC 333 334config NXP_FSPI 335 bool "NXP FlexSPI driver" 336 depends on SPI_MEM 337 help 338 Enable the NXP FlexSPI (FSPI) driver. This driver can be used to 339 access the SPI NOR flash on platforms embedding this NXP IP core. 340 341config OCTEON_SPI 342 bool "Octeon SPI driver" 343 depends on ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2 344 help 345 Enable the Octeon SPI driver. This driver can be used to 346 access the SPI NOR flash on Octeon II/III and OcteonTX/TX2 347 SoC platforms. 348 349config OMAP3_SPI 350 bool "McSPI driver for OMAP" 351 help 352 SPI master controller for OMAP24XX and later Multichannel SPI 353 (McSPI). This driver be used to access SPI chips on platforms 354 embedding this OMAP3 McSPI IP core. 355 356config PIC32_SPI 357 bool "Microchip PIC32 SPI driver" 358 depends on MACH_PIC32 359 help 360 Enable the Microchip PIC32 SPI driver. This driver can be used 361 to access the SPI NOR flash, MMC-over-SPI on platforms based on 362 Microchip PIC32 family devices. 363 364config PL022_SPI 365 bool "ARM AMBA PL022 SSP controller driver" 366 depends on ARM 367 help 368 This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP 369 controller. If you have an embedded system with an AMBA(R) 370 bus and a PL022 controller, say Y or M here. 371 372config SPI_QUP 373 bool "Qualcomm SPI controller with QUP interface" 374 depends on ARCH_IPQ40XX 375 help 376 Qualcomm Universal Peripheral (QUP) core is an AHB slave that 377 provides a common data path (an output FIFO and an input FIFO) 378 for serial peripheral interface (SPI) mini-core. SPI in master 379 mode supports up to 50MHz, up to four chip selects, programmable 380 data path from 4 bits to 32 bits and numerous protocol variants. 381 382config RENESAS_RPC_SPI 383 bool "Renesas RPC SPI driver" 384 depends on RCAR_64 || RZA1 385 imply SPI_FLASH_BAR 386 help 387 Enable the Renesas RPC SPI driver, used to access SPI NOR flash 388 on Renesas RCar Gen3 SoCs. This uses driver model and requires a 389 device tree binding to operate. 390 391config ROCKCHIP_SFC 392 bool "Rockchip SFC Driver" 393 help 394 Enable the Rockchip SFC Driver for SPI NOR flash. This device is 395 a limited purpose SPI controller for driving NOR flash on certain 396 Rockchip SoCs. This uses driver model and requires a device tree 397 binding to operate. 398 399config ROCKCHIP_SPI 400 bool "Rockchip SPI driver" 401 help 402 Enable the Rockchip SPI driver, used to access SPI NOR flash and 403 other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs. 404 This uses driver model and requires a device tree binding to 405 operate. 406 407config SANDBOX_SPI 408 bool "Sandbox SPI driver" 409 depends on SANDBOX && DM 410 help 411 Enable SPI support for sandbox. This is an emulation of a real SPI 412 bus. Devices can be attached to the bus using the device tree 413 which specifies the driver to use. As an example, see this device 414 tree fragment from sandbox.dts. It shows that the SPI bus has a 415 single flash device on chip select 0 which is emulated by the driver 416 for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c. 417 418 spi@0 { 419 #address-cells = <1>; 420 #size-cells = <0>; 421 reg = <0>; 422 compatible = "sandbox,spi"; 423 cs-gpios = <0>, <&gpio_a 0>; 424 flash@0 { 425 reg = <0>; 426 compatible = "spansion,m25p16", "jedec,spi-nor"; 427 spi-max-frequency = <40000000>; 428 sandbox,filename = "spi.bin"; 429 }; 430 }; 431 432config SANDBOX_SPI_MAX_BUS 433 int 434 depends on SANDBOX 435 default 1 436 437config SANDBOX_SPI_MAX_CS 438 int 439 depends on SANDBOX 440 default 10 441 442config SPI_ASPEED_SMC 443 bool "ASPEED SPI flash controller driver" 444 depends on DM_SPI && SPI_MEM 445 default n 446 help 447 Enable ASPEED SPI flash controller driver for AST2500 448 and AST2600 SoCs. 449 450config SPI_SIFIVE 451 bool "SiFive SPI driver" 452 help 453 This driver supports the SiFive SPI IP. If unsure say N. 454 Enable the SiFive SPI controller driver. 455 456 The SiFive SPI controller driver is found on various SiFive SoCs. 457 458config SOFT_SPI 459 bool "Soft SPI driver" 460 help 461 Enable Soft SPI driver. This driver is to use GPIO simulate 462 the SPI protocol. 463 464config SPI_SN_F_OSPI 465 tristate "Socionext F_OSPI SPI flash controller" 466 depends on SPI_MEM 467 help 468 This enables support for the Socionext F_OSPI controller 469 for connecting an SPI flash memory over up to 8-bit wide bus. 470 It supports indirect access mode only. 471 472config SPI_SUNXI 473 bool "Allwinner SoC SPI controllers" 474 default ARCH_SUNXI 475 help 476 Enable the Allwinner SoC SPi controller driver. 477 478 Same controller driver can reuse in all Allwinner SoC variants. 479 480config STM32_QSPI 481 bool "STM32F7 QSPI driver" 482 depends on STM32F4 || STM32F7 || ARCH_STM32MP 483 help 484 Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be 485 used to access the SPI NOR flash chips on platforms embedding 486 this ST IP core. 487 488config STM32_SPI 489 bool "STM32 SPI driver" 490 depends on ARCH_STM32MP 491 help 492 Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP 493 SoCs. This uses driver model and requires a device tree binding to 494 operate. 495 496config TEGRA114_SPI 497 bool "nVidia Tegra114 SPI driver" 498 help 499 Enable the nVidia Tegra114 SPI driver. This driver can be used to 500 access the SPI NOR flash on platforms embedding this nVidia Tegra114 501 IP core. 502 503 This controller is different than the older SoCs SPI controller and 504 also register interface get changed with this controller. 505 506config TEGRA20_SFLASH 507 bool "nVidia Tegra20 Serial Flash controller driver" 508 help 509 Enable the nVidia Tegra20 Serial Flash controller driver. This driver 510 can be used to access the SPI NOR flash on platforms embedding this 511 nVidia Tegra20 IP core. 512 513config TEGRA20_SLINK 514 bool "nVidia Tegra20/Tegra30 SLINK driver" 515 help 516 Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can 517 be used to access the SPI NOR flash on platforms embedding this 518 nVidia Tegra20/Tegra30 IP cores. 519 520config TEGRA210_QSPI 521 bool "nVidia Tegra210 QSPI driver" 522 help 523 Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver 524 be used to access SPI chips on platforms embedding this 525 NVIDIA Tegra210 IP core. 526 527config TI_QSPI 528 bool "TI QSPI driver" 529 imply TI_EDMA3 530 help 531 Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. 532 This driver support spi flash single, quad and memory reads. 533 534config UNIPHIER_SPI 535 bool "Socionext UniPhier SPI driver" 536 depends on ARCH_UNIPHIER 537 help 538 Enable the Socionext UniPhier SPI driver. This driver can 539 be used to access SPI chips on platforms embedding this 540 UniPhier IP core. 541 542config XILINX_SPI 543 bool "Xilinx SPI driver" 544 help 545 Enable the Xilinx SPI driver from the Xilinx EDK. This SPI 546 controller support 8 bit SPI transfers only, with or w/o FIFO. 547 For more info on Xilinx SPI Register Definitions and Overview 548 see driver file - drivers/spi/xilinx_spi.c 549 550config ZYNQ_SPI 551 bool "Zynq SPI driver" 552 help 553 Enable the Zynq SPI driver. This driver can be used to 554 access the SPI NOR flash on platforms embedding this Zynq 555 SPI IP core. 556 557config ZYNQ_QSPI 558 bool "Zynq QSPI driver" 559 imply SPI_FLASH_BAR 560 help 561 Enable the Zynq Quad-SPI (QSPI) driver. This driver can be 562 used to access the SPI NOR flash on platforms embedding this 563 Zynq QSPI IP core. This IP is used to connect the flash in 564 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. 565 566config ZYNQMP_GQSPI 567 bool "Configure ZynqMP Generic QSPI" 568 help 569 This option is used to enable ZynqMP QSPI controller driver which 570 is used to communicate with qspi flash devices. 571 572endif # if DM_SPI 573 574config FSL_ESPI 575 bool "Freescale eSPI driver" 576 depends on MPC85xx 577 imply SPI_FLASH_BAR 578 help 579 Enable the Freescale eSPI driver. This driver can be used to 580 access the SPI interface and SPI NOR flash on platforms embedding 581 this Freescale eSPI IP core. 582 583config SH_QSPI 584 bool "Renesas Quad SPI driver" 585 help 586 Enable the Renesas Quad SPI controller driver. This driver can be 587 used on Renesas SoCs. 588 589config MXC_SPI 590 bool "MXC SPI Driver" 591 help 592 Enable the MXC SPI controller driver. This driver can be used 593 on various i.MX SoCs such as i.MX31/35/51/6/7. 594 595config SYNQUACER_SPI 596 bool "Socionext SynQuacer HS-SPI driver" 597 depends on ARCH_SYNQUACER 598 help 599 Enable the Socionext HS-SPI driver for SynQuacer. This driver can 600 be used to access the SPI interface and SPI NOR flash on platforms 601 embedding this HS-SPI IP core. 602 603endif # menu "SPI Support" 604