1#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
6config USB_HOST
7	bool
8	select DM_USB
9
10config USB_XHCI_HCD
11	bool "xHCI HCD (USB 3.0) support"
12	depends on DM && OF_CONTROL
13	select USB_HOST
14	---help---
15	  The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
16	  "SuperSpeed" host controller hardware.
17
18if USB_XHCI_HCD
19
20config USB_XHCI_DWC3
21	bool "DesignWare USB3 DRD Core Support"
22	help
23	  Say Y or if your system has a Dual Role SuperSpeed
24	  USB controller based on the DesignWare USB3 IP Core.
25
26config USB_XHCI_DWC3_OF_SIMPLE
27	bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
28	depends on DM_USB
29	default y if ARCH_ROCKCHIP
30	default y if DRA7XX
31	help
32	  Support USB2/3 functionality in simple SoC integrations with
33	  USB controller based on the DesignWare USB3 IP Core.
34
35config USB_XHCI_EXYNOS
36	bool "Support for Samsung Exynos5 family on-chip xHCI USB controller"
37	depends on ARCH_EXYNOS5
38	default y
39	help
40	  Enables support for he on-chip xHCI controller on Samsung Exynos5
41	  SoCs.
42
43config USB_XHCI_MTK
44	bool "Support for MediaTek on-chip xHCI USB controller"
45	depends on ARCH_MEDIATEK || SOC_MT7621
46	help
47	  Enables support for the on-chip xHCI controller on MediaTek SoCs.
48
49config USB_XHCI_MVEBU
50	bool "MVEBU USB 3.0 support"
51	default y
52	depends on ARCH_MVEBU
53	select DM_REGULATOR
54	help
55	  Choose this option to add support for USB 3.0 driver on mvebu
56	  SoCs, which includes Armada8K, Armada3700 and other Armada
57	  family SoCs.
58
59config USB_XHCI_OCTEON
60	bool "Support for Marvell Octeon family on-chip xHCI USB controller"
61	depends on ARCH_OCTEON
62	default y
63	help
64	  Enables support for the on-chip xHCI controller on Marvell Octeon
65	  family SoCs. This is a driver for the dwc3 to provide the glue logic
66	  to configure the controller.
67
68config USB_XHCI_OMAP
69	bool "Support for TI OMAP family xHCI USB controller"
70	depends on ARCH_OMAP2PLUS
71	help
72	  Enables support for the on-chip xHCI controller found on some TI SoC
73	  families.  Note that some families have multiple contollers while
74	  others only have something such as DesignWare-based controllers.
75	  Consult the SoC documentation to determine if this option applies
76	  to your hardware.
77
78config USB_XHCI_PCI
79	bool "Support for PCI-based xHCI USB controller"
80	depends on DM_USB
81	default y if X86
82	help
83	  Enables support for the PCI-based xHCI controller.
84
85config USB_XHCI_RCAR
86	bool "Renesas RCar USB 3.0 support"
87	default y
88	depends on ARCH_RMOBILE
89	help
90	  Choose this option to add support for USB 3.0 driver on Renesas
91	  RCar Gen3 SoCs.
92
93config USB_XHCI_STI
94	bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
95	depends on ARCH_STI
96	default y
97	help
98	  Enables support for the on-chip xHCI controller on STMicroelectronics
99	  STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
100	  to configure the controller.
101
102config USB_XHCI_DRA7XX_INDEX
103	int "DRA7XX xHCI USB index"
104	range 0 1
105	default 0
106	depends on DRA7XX
107	help
108	  Select the DRA7XX xHCI USB index.
109	  Current supported values: 0, 1.
110
111config USB_XHCI_FSL
112	bool "Support for NXP Layerscape on-chip xHCI USB controller"
113	default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
114	depends on !SPL_NO_USB
115	help
116	  Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
117
118config USB_XHCI_BRCM
119	bool "Broadcom USB3 Host XHCI controller"
120	depends on DM_USB
121	help
122	  USB controller based on the Broadcom USB3 IP Core.
123	  Supports USB2/3 functionality.
124
125endif # USB_XHCI_HCD
126
127config EHCI_DESC_BIG_ENDIAN
128	bool
129
130config EHCI_MMIO_BIG_ENDIAN
131	bool
132
133config USB_EHCI_HCD
134	bool "EHCI HCD (USB 2.0) support"
135	default y if ARCH_MX5 || ARCH_MX6
136	depends on DM && OF_CONTROL
137	select USB_HOST
138	select EHCI_DESC_BIG_ENDIAN if SYS_BIG_ENDIAN
139	select EHCI_MMIO_BIG_ENDIAN if SYS_BIG_ENDIAN
140	---help---
141	  The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
142	  "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
143	  If your USB host controller supports USB 2.0, you will likely want to
144	  configure this Host Controller Driver.
145
146	  EHCI controllers are packaged with "companion" host controllers (OHCI
147	  or UHCI) to handle USB 1.1 devices connected to root hub ports.  Ports
148	  will connect to EHCI if the device is high speed, otherwise they
149	  connect to a companion controller.  If you configure EHCI, you should
150	  probably configure the OHCI (for NEC and some other vendors) USB Host
151	  Controller Driver or UHCI (for Via motherboards) Host Controller
152	  Driver too.
153
154	  You may want to read <file:Documentation/usb/ehci.txt>.
155
156if USB_EHCI_HCD
157
158config USB_EHCI_IS_TDI
159	bool
160
161config USB_EHCI_ATMEL
162	bool  "Support for Atmel on-chip EHCI USB controller"
163	depends on ARCH_AT91
164	default y
165	---help---
166	  Enables support for the on-chip EHCI controller on Atmel chips.
167
168config USB_EHCI_EXYNOS
169	bool "Support for Samsung Exynos EHCI USB controller"
170	depends on ARCH_EXYNOS
171	default y
172	---help---
173	  Enables support for the on-chip EHCI controller on Samsung Exynos
174	  SoCs.
175
176config USB_EHCI_MARVELL
177	bool "Support for Marvell on-chip EHCI USB controller"
178	depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
179	default y
180	select USB_EHCI_IS_TDI if !ARM64
181	select USB_EHCI_IS_TDI if ALLEYCAT_5
182	---help---
183	  Enables support for the on-chip EHCI controller on MVEBU SoCs.
184
185config USB_EHCI_MX5
186	bool "Support for i.MX5 on-chip EHCI USB controller"
187	depends on ARCH_MX5
188	help
189	  Enables support for the on-chip EHCI controller on i.MX5 SoCs.
190
191config USB_EHCI_MX6
192	bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
193	depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
194	select EHCI_HCD_INIT_AFTER_RESET
195	default y
196	---help---
197	  Enables support for the on-chip EHCI controller on i.MX6 SoCs.
198
199config USB_EHCI_MX7
200	bool "Support for i.MX7 on-chip EHCI USB controller"
201	depends on ARCH_MX7 || IMX8M
202	select EHCI_HCD_INIT_AFTER_RESET if ARCH_MX7
203	select PHY if IMX8M
204	select NOP_PHY if IMX8M
205	default y
206	---help---
207	  Enables support for the on-chip EHCI controller on i.MX7 SoCs.
208
209config USB_EHCI_MXS
210	bool "Support for i.MX23/i.MX28 EHCI USB controller"
211	depends on ARCH_MX23 || ARCH_MX28
212	default y
213	select USB_EHCI_IS_TDI
214	help
215	  Enables support for the on-chip EHCI controller on i.MX23 and
216	  i.MX28 SoCs.
217
218config USB_EHCI_NPCM
219	bool "Support for Nuvoton NPCM on-chip EHCI USB controller"
220	depends on ARCH_NPCM
221	default n
222	---help---
223	  Enables support for the on-chip EHCI controller on
224	  Nuvoton NPCM chips.
225
226config USB_EHCI_OMAP
227	bool "Support for OMAP3+ on-chip EHCI USB controller"
228	depends on ARCH_OMAP2PLUS
229	select PHY
230	imply NOP_PHY
231	default y
232	---help---
233	  Enables support for the on-chip EHCI controller on OMAP3 and later
234	  SoCs.
235
236config USB_EHCI_VF
237	bool "Support for Vybrid on-chip EHCI USB controller"
238	depends on ARCH_VF610
239	default y
240	help
241	  Enables support for the on-chip EHCI controller on Vybrid SoCs.
242
243if USB_EHCI_MX6 || USB_EHCI_MX7
244
245config MXC_USB_OTG_HACTIVE
246	bool "USB Power pin high active"
247	---help---
248	  Set the USB Power pin polarity to be high active (PWR_POL)
249
250endif
251
252config USB_EHCI_MSM
253	bool "Support for Qualcomm on-chip EHCI USB controller"
254	depends on DM_USB
255	select USB_ULPI_VIEWPORT
256	select MSM8916_USB_PHY
257	---help---
258	  Enables support for the on-chip EHCI controller on Qualcomm
259	  Snapdragon SoCs.
260
261config USB_EHCI_PCI
262	bool "Support for PCI-based EHCI USB controller"
263	default y if X86
264	help
265	  Enables support for the PCI-based EHCI controller.
266
267config USB_EHCI_TEGRA
268	bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
269	depends on ARCH_TEGRA
270	select USB_EHCI_IS_TDI
271	---help---
272	  Enable support for Tegra on-chip EHCI USB controller
273
274config USB_EHCI_ZYNQ
275	bool "Support for Xilinx Zynq on-chip EHCI USB controller"
276	default y if ARCH_ZYNQ
277	select USB_EHCI_IS_TDI
278	---help---
279	  Enable support for Zynq on-chip EHCI USB controller
280
281config USB_EHCI_GENERIC
282	bool "Support for generic EHCI USB controller"
283	depends on DM_USB
284	default ARCH_SUNXI
285	---help---
286	  Enables support for generic EHCI controller.
287
288config EHCI_HCD_INIT_AFTER_RESET
289	bool
290
291config USB_EHCI_FSL
292	bool  "Support for FSL on-chip EHCI USB controller"
293	select EHCI_HCD_INIT_AFTER_RESET
294	select SYS_FSL_USB_INTERNAL_UTMI_PHY if MPC85xx && \
295		!(ARCH_B4860 || ARCH_B4420 || ARCH_P4080 || ARCH_P1020 || ARCH_P2020)
296	---help---
297	  Enables support for the on-chip EHCI controller on FSL chips.
298
299config SYS_FSL_USB_INTERNAL_UTMI_PHY
300	bool
301	depends on USB_EHCI_FSL
302
303config USB_EHCI_TXFIFO_THRESH
304	hex
305	depends on USB_EHCI_TEGRA
306	default 0x10
307	help
308	  This parameter affects a TXFILLTUNING field that controls how much
309	  data is sent to the latency fifo before it is sent to the wire.
310	  Without this parameter, the default (2) causes occasional Data Buffer
311	  Errors in OUT packets depending on the buffer address and size.
312
313endif # USB_EHCI_HCD
314
315config USB_OHCI_NEW
316	bool
317
318config SYS_USB_OHCI_CPU_INIT
319	bool
320
321config USB_OHCI_HCD
322	bool "OHCI HCD (USB 1.1) support"
323	depends on DM && OF_CONTROL
324	select USB_HOST
325	select USB_OHCI_NEW
326	---help---
327	  The Open Host Controller Interface (OHCI) is a standard for accessing
328	  USB 1.1 host controller hardware.  It does more in hardware than Intel's
329	  UHCI specification.  If your USB host controller follows the OHCI spec,
330	  say Y.  On most non-x86 systems, and on x86 hardware that's not using a
331	  USB controller from Intel or VIA, this is appropriate.  If your host
332	  controller doesn't use PCI, this is probably appropriate.  For a PCI
333	  based system where you're not sure, the "lspci -v" entry will list the
334	  right "prog-if" for your USB controller(s):  EHCI, OHCI, or UHCI.
335
336if USB_OHCI_HCD
337
338config USB_OHCI_PCI
339	bool "Support for PCI-based OHCI USB controller"
340	depends on PCI
341	help
342	  Enables support for the PCI-based OHCI controller.
343
344config USB_OHCI_GENERIC
345	bool "Support for generic OHCI USB controller"
346	default ARCH_SUNXI
347	---help---
348	  Enables support for generic OHCI controller.
349
350config USB_OHCI_DA8XX
351	bool "Support for da850 OHCI USB controller"
352	help
353	  Enable support for the da850 USB controller.
354
355config USB_OHCI_NPCM
356	bool "Support for Nuvoton NPCM on-chip OHCI USB controller"
357	depends on ARCH_NPCM
358	default n
359	---help---
360	  Enables support for the on-chip OHCI controller on
361	  Nuvoton NPCM chips.
362
363endif # USB_OHCI_HCD
364
365config SYS_USB_OHCI_SLOT_NAME
366	string "Display name for the OHCI controller"
367	depends on USB_OHCI_NEW && !DM_USB
368
369config SYS_OHCI_SWAP_REG_ACCESS
370	bool "Perform byte swapping on OHCI controller register accesses"
371	depends on USB_OHCI_NEW
372
373config USB_UHCI_HCD
374	bool "UHCI HCD (most Intel and VIA) support"
375	select USB_HOST
376	---help---
377	  The Universal Host Controller Interface is a standard by Intel for
378	  accessing the USB hardware in the PC (which is also called the USB
379	  host controller). If your USB host controller conforms to this
380	  standard, you may want to say Y, but see below. All recent boards
381	  with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
382	  i810, i820) conform to this standard. Also all VIA PCI chipsets
383	  (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
384	  133) and LEON/GRLIB SoCs with the GRUSBHC controller.
385	  If unsure, say Y.
386
387if USB_UHCI_HCD
388
389endif # USB_UHCI_HCD
390
391config USB_DWC2
392	bool "DesignWare USB2 Core support"
393	depends on DM && OF_CONTROL
394	select USB_HOST
395	---help---
396	  The DesignWare USB 2.0 controller is compliant with the
397	  USB-Implementers Forum (USB-IF) USB 2.0 specifications.
398	  Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
399	  operation is compliant to the controller Supplement. If you want to
400	  enable this controller in host mode, say Y.
401
402if USB_DWC2
403config USB_DWC2_BUFFER_SIZE
404	int "Data buffer size in kB"
405	default 64
406	---help---
407	  By default 64 kB buffer is used but if amount of RAM avaialble on
408	  the target is not enough to accommodate allocation of buffer of
409	  that size it is possible to shrink it. Smaller sizes should be fine
410	  because larger transactions could be split in smaller ones.
411
412endif # USB_DWC2
413
414config USB_R8A66597_HCD
415	bool "Renesas R8A66597 USB Core support"
416	depends on DM && OF_CONTROL
417	select USB_HOST
418	---help---
419	  This enables support for the on-chip Renesas R8A66597 USB 2.0
420	  controller, present in various RZ and SH SoCs.
421
422config USB_ATMEL
423	bool "AT91 OHCI USB support"
424	depends on ARCH_AT91
425	select SYS_USB_OHCI_CPU_INIT
426	select USB_OHCI_NEW
427
428choice
429	prompt "Clock for OHCI"
430	depends on USB_ATMEL
431
432config USB_ATMEL_CLK_SEL_PLLB
433	bool "PLLB"
434
435config USB_ATMEL_CLK_SEL_UPLL
436	bool "UPLL"
437
438endchoice
439
440config USB_OHCI_LPC32XX
441	bool "LPC32xx USB OHCI support"
442	depends on ARCH_LPC32XX
443	select SYS_USB_OHCI_CPU_INIT
444	select USB_OHCI_NEW
445
446config USB_MAX_CONTROLLER_COUNT
447	int "Maximum number of USB host controllers"
448	depends on USB_EHCI_FSL || USB_XHCI_FSL || \
449		(SPL_USB_HOST && !DM_SPL_USB) || (USB_HOST && !DM_USB)
450	default 1
451