1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuration settings for the Sentec Cobra Board. 4 * 5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 6 */ 7 8 /* 9 * configuration for ASTRO "Urmel" board. 10 * Originating from Cobra5272 configuration, messed up by 11 * Wolfgang Wegner <w.wegner@astro-kom.de> 12 * Please do not bother the original author with bug reports 13 * concerning this file. 14 */ 15 16 #ifndef _CONFIG_ASTRO_MCF5373L_H 17 #define _CONFIG_ASTRO_MCF5373L_H 18 19 #include <linux/stringify.h> 20 21 /* 22 * set the card type to actually compile for; either of 23 * the possibilities listed below has to be used! 24 */ 25 #define ASTRO_V532 1 26 27 #if ASTRO_V532 28 #define ASTRO_ID 0xF8 29 #elif ASTRO_V512 30 #define ASTRO_ID 0xFA 31 #elif ASTRO_TWIN7S2 32 #define ASTRO_ID 0xF9 33 #elif ASTRO_V912 34 #define ASTRO_ID 0xFC 35 #elif ASTRO_COFDMDUOS2 36 #define ASTRO_ID 0xFB 37 #else 38 #error No card type defined! 39 #endif 40 41 /* I2C */ 42 43 /* 44 * Defines processor clock - important for correct timings concerning serial 45 * interface etc. 46 */ 47 48 #define CFG_SYS_CLK 80000000 49 #define CFG_SYS_CPU_CLK (CFG_SYS_CLK * 3) 50 #define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 51 52 /* 53 * Define baudrate for UART1 (console output, tftp, ...) 54 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 55 * CFG_SYS_BAUDRATE_TABLE defines values that can be selected 56 * in u-boot command interface 57 */ 58 59 #define CFG_SYS_UART_PORT (2) 60 #define CFG_SYS_UART2_ALT3_GPIO 61 62 /* here we put our FPGA configuration... */ 63 64 /* Define user parameters that have to be customized most likely */ 65 66 /* AUTOBOOT settings - booting images automatically by u-boot after power on */ 67 68 /* 69 * The following settings will be contained in the environment block ; if you 70 * want to use a neutral environment all those settings can be manually set in 71 * u-boot: 'set' command 72 */ 73 74 #define CFG_EXTRA_ENV_SETTINGS \ 75 "loaderversion=11\0" \ 76 "card_id="__stringify(ASTRO_ID)"\0" \ 77 "alterafile=0\0" \ 78 "xilinxfile=0\0" \ 79 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 80 "fpga load 0 0x41000000 $filesize\0" \ 81 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 82 "fpga load 1 0x41000000 $filesize\0" \ 83 "env_default=1\0" \ 84 "env_check=if test $env_default -eq 1;"\ 85 " then setenv env_default 0;saveenv;fi\0" 86 87 /* 88 * "update" is a non-standard command that has to be supplied 89 * by external update.c; This is not included in mainline because 90 * it needs non-blocking CFI routines. 91 */ 92 93 #define CFG_SYS_FPGA_WAIT 1000 94 95 /* End of user parameters to be customized */ 96 97 /* Defines memory range for test */ 98 99 /* 100 * Low Level Configuration Settings 101 * (address mappings, register initial values, etc.) 102 * You should know what you are doing if you make changes here. 103 */ 104 105 /* Base register address */ 106 107 #define CFG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 108 109 /* System Conf. Reg. & System Protection Reg. */ 110 111 #define CFG_SYS_SCR 0x0003; 112 #define CFG_SYS_SPR 0xffff; 113 114 /* 115 * Definitions for initial stack pointer and data area (in internal SRAM) 116 */ 117 #define CFG_SYS_INIT_RAM_ADDR 0x80000000 118 #define CFG_SYS_INIT_RAM_SIZE 0x8000 119 #define CFG_SYS_INIT_RAM_CTRL 0x221 120 121 /* 122 * Start addresses for the final memory configuration 123 * (Set up by the startup code) 124 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 125 */ 126 #define CFG_SYS_SDRAM_BASE 0x40000000 127 128 /* 129 * Chipselect bank definitions 130 * 131 * CS0 - Flash 32MB (first 16MB) 132 * CS1 - Flash 32MB (second half) 133 * CS2 - FPGA 134 * CS3 - FPGA 135 * CS4 - unused 136 * CS5 - unused 137 */ 138 #define CFG_SYS_CS0_BASE 0 139 #define CFG_SYS_CS0_MASK 0x00ff0001 140 #define CFG_SYS_CS0_CTRL 0x00001fc0 141 142 #define CFG_SYS_CS1_BASE 0x01000000 143 #define CFG_SYS_CS1_MASK 0x00ff0001 144 #define CFG_SYS_CS1_CTRL 0x00001fc0 145 146 #define CFG_SYS_CS2_BASE 0x20000000 147 #define CFG_SYS_CS2_MASK 0x00ff0001 148 #define CFG_SYS_CS2_CTRL 0x0000fec0 149 150 #define CFG_SYS_CS3_BASE 0x21000000 151 #define CFG_SYS_CS3_MASK 0x00ff0001 152 #define CFG_SYS_CS3_CTRL 0x0000fec0 153 154 #define CFG_SYS_FLASH_BASE 0x00000000 155 156 /* Reserve 256 kB for Monitor */ 157 158 /* 159 * For booting Linux, the board info and command line data 160 * have to be in the first 8 MB of memory, since this is 161 * the maximum mapped by the Linux kernel during initialization ?? 162 */ 163 #define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ 164 (CFG_SYS_SDRAM_SIZE << 20)) 165 166 /* FLASH organization */ 167 168 #define CFG_SYS_FLASH_SIZE 0x2000000 169 170 #define LDS_BOARD_TEXT \ 171 . = DEFINED(env_offset) ? env_offset : .; \ 172 env/embedded.o(.text*) 173 174 /* Cache Configuration */ 175 176 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ 177 CFG_SYS_INIT_RAM_SIZE - 8) 178 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ 179 CFG_SYS_INIT_RAM_SIZE - 4) 180 #define CFG_SYS_ICACHE_INV (CF_CACR_CINVA) 181 #define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ 182 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ 183 CF_ACR_EN | CF_ACR_SM_ALL) 184 #define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 185 CF_CACR_DCM_P) 186 187 188 #endif /* _CONFIG_ASTRO_MCF5373L_H */ 189