1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2019 NXP 4 */ 5 6 #ifndef __IMX8MM_CL_IOT_GATE_H 7 #define __IMX8MM_CL_IOT_GATE_H 8 9 #include <linux/sizes.h> 10 #include <linux/stringify.h> 11 #include <asm/arch/imx-regs.h> 12 #include <config_distro_bootcmd.h> 13 14 #define CFG_SYS_UBOOT_BASE \ 15 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 16 17 #ifdef CONFIG_SPL_BUILD 18 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 19 #define CFG_MALLOC_F_ADDR 0x912000 20 /* For RAW image gives a error info not panic */ 21 22 #endif 23 24 /* GUIDs for capsule updatable firmware images */ 25 #define IMX8MM_CL_IOT_GATE_FIT_IMAGE_GUID \ 26 EFI_GUID(0x7a32a939, 0xab92, 0x467b, 0x91, 0x52, \ 27 0x74, 0x77, 0x1b, 0x95, 0xe6, 0x46) 28 29 #define IMX8MM_CL_IOT_GATE_OPTEE_FIT_IMAGE_GUID \ 30 EFI_GUID(0x0bf1165c, 0x1831, 0x4864, 0x94, 0x5e, \ 31 0xac, 0x3d, 0x38, 0x48, 0xf4, 0x99) 32 33 #if IS_ENABLED(CONFIG_CMD_MMC) 34 # define BOOT_TARGET_MMC(func) \ 35 func(MMC, mmc, 2) \ 36 func(MMC, mmc, 0) 37 #else 38 # define BOOT_TARGET_MMC(func) 39 #endif 40 41 #if IS_ENABLED(CONFIG_CMD_USB) 42 # define BOOT_TARGET_USB(func) func(USB, usb, 0) 43 #else 44 # define BOOT_TARGET_USB(func) 45 #endif 46 47 #if CONFIG_IS_ENABLED(CMD_PXE) 48 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na) 49 #else 50 # define BOOT_TARGET_PXE(func) 51 #endif 52 53 #if CONFIG_IS_ENABLED(CMD_DHCP) 54 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) 55 #else 56 # define BOOT_TARGET_DHCP(func) 57 #endif 58 59 #define BOOT_TARGET_DEVICES(func) \ 60 BOOT_TARGET_USB(func) \ 61 BOOT_TARGET_MMC(func) \ 62 BOOT_TARGET_PXE(func) \ 63 BOOT_TARGET_DHCP(func) 64 65 /* Initial environment variables */ 66 #define CFG_EXTRA_ENV_SETTINGS \ 67 BOOTENV \ 68 "script=boot.scr\0" \ 69 "image=Image\0" \ 70 "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ 71 "fdt_addr=0x43000000\0" \ 72 "fdt_addr_r=0x43000000\0" \ 73 "boot_fit=no\0" \ 74 "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \ 75 "fdt_file=sb-iotgimx8.dtb\0" \ 76 "fdtfile=sb-iotgimx8.dtb\0" \ 77 "initrd_addr=0x43800000\0" \ 78 "bootm_size=0x10000000\0" \ 79 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 80 "mmcpart=1\0" \ 81 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ 82 "mmcautodetect=yes\0" \ 83 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ 84 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 85 "bootscript=echo Running bootscript from mmc ...; " \ 86 "source\0" \ 87 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 88 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 89 "kernel_addr_r=0x40480000\0" \ 90 "pxefile_addr_r=0x40480000\0" \ 91 "ramdisk_addr_r=0x43800000\0" \ 92 "mmcboot=echo Booting from mmc ...; " \ 93 "run mmcargs; " \ 94 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 95 "bootm ${loadaddr}; " \ 96 "else " \ 97 "if run loadfdt; then " \ 98 "booti ${loadaddr} - ${fdt_addr}; " \ 99 "else " \ 100 "echo WARN: Cannot load the DT; " \ 101 "fi; " \ 102 "fi;\0" \ 103 "netargs=setenv bootargs console=${console} " \ 104 "root=/dev/nfs " \ 105 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 106 "netboot=echo Booting from net ...; " \ 107 "run netargs; " \ 108 "if test ${ip_dyn} = yes; then " \ 109 "setenv get_cmd dhcp; " \ 110 "else " \ 111 "setenv get_cmd tftp; " \ 112 "fi; " \ 113 "${get_cmd} ${loadaddr} ${image}; " \ 114 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 115 "bootm ${loadaddr}; " \ 116 "else " \ 117 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 118 "booti ${loadaddr} - ${fdt_addr}; " \ 119 "else " \ 120 "echo WARN: Cannot load the DT; " \ 121 "fi; " \ 122 "fi;\0" 123 124 /* Link Definitions */ 125 126 #define CFG_SYS_INIT_RAM_ADDR 0x40000000 127 #define CFG_SYS_INIT_RAM_SIZE 0x80000 128 129 130 #define CFG_SYS_SDRAM_BASE 0x40000000 131 #define PHYS_SDRAM 0x40000000 132 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 133 134 /* USDHC */ 135 136 #define CFG_SYS_FSL_USDHC_NUM 2 137 #define CFG_SYS_FSL_ESDHC_ADDR 0 138 139 #define CFG_FEC_MXC_PHYADDR 0 140 141 /* USB Configs */ 142 #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 143 144 #endif /*__IMX8MM_CL_IOT_GATE_H*/ 145