1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef __CONFIG_RK3399_COMMON_H 7 #define __CONFIG_RK3399_COMMON_H 8 9 #include "rockchip-common.h" 10 11 #define CFG_IRAM_BASE 0xff8c0000 12 13 #define CFG_SYS_SDRAM_BASE 0 14 #define SDRAM_MAX_SIZE 0xf8000000 15 16 #define ROCKPI_4B_IDBLOADER_IMAGE_GUID \ 17 EFI_GUID(0x02f4d760, 0xcfd5, 0x43bd, 0x8e, 0x2d, \ 18 0xa4, 0x2a, 0xcb, 0x33, 0xc6, 0x60) 19 20 #define ROCKPI_4B_UBOOT_IMAGE_GUID \ 21 EFI_GUID(0x4ce292da, 0x1dd8, 0x428d, 0xa1, 0xc2, \ 22 0x77, 0x74, 0x3e, 0xf8, 0xb9, 0x6e) 23 24 #define ROCKPI_4C_IDBLOADER_IMAGE_GUID \ 25 EFI_GUID(0xfd68510c, 0x12d3, 0x4f0a, 0xb8, 0xd3, \ 26 0xd8, 0x79, 0xe1, 0xd3, 0xa5, 0x40) 27 28 #define ROCKPI_4C_UBOOT_IMAGE_GUID \ 29 EFI_GUID(0xb81fb4ae, 0xe4f3, 0x471b, 0x99, 0xb4, \ 30 0x0b, 0x3d, 0xa5, 0x49, 0xce, 0x13) 31 32 #ifndef CONFIG_SPL_BUILD 33 34 #define ENV_MEM_LAYOUT_SETTINGS \ 35 "scriptaddr=0x00500000\0" \ 36 "script_offset_f=0xffe000\0" \ 37 "script_size_f=0x2000\0" \ 38 "pxefile_addr_r=0x00600000\0" \ 39 "fdt_addr_r=0x01f00000\0" \ 40 "fdtoverlay_addr_r=0x02000000\0" \ 41 "kernel_addr_r=0x02080000\0" \ 42 "ramdisk_addr_r=0x06000000\0" \ 43 "kernel_comp_addr_r=0x08000000\0" \ 44 "kernel_comp_size=0x2000000\0" 45 46 #ifndef ROCKCHIP_DEVICE_SETTINGS 47 #define ROCKCHIP_DEVICE_SETTINGS 48 #endif 49 50 #define CFG_EXTRA_ENV_SETTINGS \ 51 ENV_MEM_LAYOUT_SETTINGS \ 52 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ 53 "partitions=" PARTS_DEFAULT \ 54 ROCKCHIP_DEVICE_SETTINGS \ 55 "boot_targets=" BOOT_TARGETS "\0" 56 57 #endif 58 59 #endif 60