1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
4  */
5 
6 #ifndef _CONFIG_THEADORABLE_H
7 #define _CONFIG_THEADORABLE_H
8 
9 #include <linux/sizes.h>
10 
11 /*
12  * High Level Configuration Options (easy to change)
13  */
14 
15 /*
16  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
17  * for DDR ECC byte filling in the SPL before loading the main
18  * U-Boot into it.
19  */
20 
21 /*
22  * The debugging version enables USB support via defconfig.
23  * This version should also enable all other non-production
24  * interfaces / features.
25  */
26 
27 /* I2C */
28 #define CFG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE
29 #define CFG_I2C_MVTWSI_BASE1		MVEBU_TWSI1_BASE
30 
31 /* USB/EHCI configuration */
32 
33 /* Environment in SPI NOR flash */
34 
35 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
36 
37 /* Keep device tree and initrd in lower memory so the kernel can access them */
38 #define CFG_EXTRA_ENV_SETTINGS	\
39 	"fdt_high=0x10000000\0"		\
40 	"initrd_high=0x10000000\0"
41 
42 /*
43  * Bootcounter
44  */
45 /* Max size of RAM minus BOOTCOUNT_ADDR is the bootcounter address */
46 #define BOOTCOUNT_ADDR			0x1000
47 
48 /*
49  * mv-common.h should be defined after CMD configs since it used them
50  * to enable certain macros
51  */
52 #include "mv-common.h"
53 
54 /*
55  * Memory layout while starting into the bin_hdr via the
56  * BootROM:
57  *
58  * 0x4000.4000 - 0x4003.4000	headers space (192KiB)
59  * 0x4000.4030			bin_hdr start address
60  * 0x4003.4000 - 0x4004.7c00	BootROM memory allocations (15KiB)
61  * 0x4007.fffc			BootROM stack top
62  *
63  * The address space between 0x4007.fffc and 0x400f.fff is not locked in
64  * L2 cache thus cannot be used.
65  */
66 
67 /* SPL */
68 /* Defines for SPL */
69 
70 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
71 #define CFG_SYS_SDRAM_SIZE		SZ_2G
72 
73 #endif /* _CONFIG_THEADORABLE_H */
74