1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuration for Versatile Express. Parts were derived from other ARM 4 * configurations. 5 */ 6 7 #ifndef __VEXPRESS_AEMV8_H 8 #define __VEXPRESS_AEMV8_H 9 10 #include <linux/stringify.h> 11 12 /* Link Definitions */ 13 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 14 #else 15 /* ATF loads u-boot here for BASE_FVP model */ 16 #endif 17 18 /* CS register bases for the original memory map. */ 19 #ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP 20 #define V2M_DRAM_BASE 0x00000000 21 #define V2M_PA_BASE 0x80000000 22 #else 23 #define V2M_DRAM_BASE 0x80000000 24 #define V2M_PA_BASE 0x00000000 25 #endif 26 27 #define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000) 28 #define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000) 29 #define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000) 30 #define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000) 31 #define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000) 32 #define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000) 33 34 #define V2M_PERIPH_OFFSET(x) (x << 16) 35 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 36 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 37 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 38 39 /* Common peripherals relative to CS7. */ 40 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 41 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 42 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 43 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 44 45 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 46 #define V2M_UART0 0x7ff80000 47 #define V2M_UART1 0x7ff70000 48 #else /* Not Juno */ 49 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 50 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 51 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 52 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 53 #endif 54 55 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 56 57 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 58 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 59 60 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 61 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 62 63 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 64 65 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 66 67 /* System register offsets. */ 68 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 69 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 70 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 71 72 /* Generic Interrupt Controller Definitions */ 73 #ifdef CONFIG_GICV3 74 #define GICD_BASE (V2M_PA_BASE + 0x2f000000) 75 #define GICR_BASE (V2M_PA_BASE + 0x2f100000) 76 #else 77 78 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 79 #define GICD_BASE (0x2C010000) 80 #define GICC_BASE (0x2C02f000) 81 #else 82 #define GICD_BASE (V2M_PA_BASE + 0x2f000000) 83 #define GICC_BASE (V2M_PA_BASE + 0x2c000000) 84 #endif 85 #endif /* !CONFIG_GICV3 */ 86 87 /* PL011 Serial Configuration */ 88 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 89 #define CFG_PL011_CLOCK 7372800 90 #else 91 #define CFG_PL011_CLOCK 24000000 92 #endif 93 94 /* Physical Memory Map */ 95 #define PHYS_SDRAM_1 (V2M_DRAM_BASE) /* SDRAM Bank #1 */ 96 /* Top 16MB reserved for secure world use */ 97 #define DRAM_SEC_SIZE 0x01000000 98 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 99 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 100 101 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 102 #define PHYS_SDRAM_2 (0x880000000) 103 #define PHYS_SDRAM_2_SIZE 0x180000000 104 #elif CONFIG_NR_DRAM_BANKS == 2 105 #define PHYS_SDRAM_2 (0x880000000) 106 #define PHYS_SDRAM_2_SIZE 0x80000000 107 #endif 108 109 /* Copy the kernel, initrd and FDT from NOR flash to DRAM memory and boot. */ 110 #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \ 111 "bootcmd_afs=" \ 112 "afs load ${kernel_name} ${kernel_addr_r} ;"\ 113 "if test $? -eq 1; then "\ 114 " echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\ 115 " afs load ${kernel_alt_name} ${kernel_addr_r};"\ 116 "fi ; "\ 117 "afs load ${fdtfile} ${fdt_addr_r} ;"\ 118 "if test $? -eq 1; then "\ 119 " echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\ 120 " afs load ${fdt_alt_name} ${fdt_addr_r}; "\ 121 "fi ; "\ 122 "fdt addr ${fdt_addr_r}; fdt resize; " \ 123 "if afs load ${ramdisk_name} ${ramdisk_addr_r} ; "\ 124 "then "\ 125 " setenv ramdisk_param ${ramdisk_addr_r}; "\ 126 "else "\ 127 " setenv ramdisk_param -; "\ 128 "fi ; " \ 129 "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0" 130 #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs " 131 132 /* Boot by executing a U-Boot script pre-loaded into DRAM. */ 133 #define BOOTENV_DEV_MEM(devtypeu, devtypel, instance) \ 134 "bootcmd_mem= " \ 135 "source ${scriptaddr}; " \ 136 "if test $? -eq 1; then " \ 137 " env import -t ${scriptaddr}; " \ 138 " if test -n $uenvcmd; then " \ 139 " echo Running uenvcmd ...; " \ 140 " run uenvcmd; " \ 141 " fi; " \ 142 "fi\0" 143 #define BOOTENV_DEV_NAME_MEM(devtypeu, devtypel, instance) "mem " 144 145 #ifdef CONFIG_CMD_VIRTIO 146 #define FUNC_VIRTIO(func) func(VIRTIO, virtio, 0) 147 #else 148 #define FUNC_VIRTIO(func) 149 #endif 150 151 /* 152 * Boot by loading an Android image, or kernel, initrd and FDT through 153 * semihosting into DRAM. 154 */ 155 #define BOOTENV_DEV_SMH(devtypeu, devtypel, instance) \ 156 "bootcmd_smh= " \ 157 "if load hostfs - ${boot_addr_r} ${boot_name}; then" \ 158 " setenv bootargs;" \ 159 " abootimg addr ${boot_addr_r};" \ 160 " abootimg get dtb --index=0 fdt_addr_r;" \ 161 " bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r};" \ 162 "else" \ 163 " if load hostfs - ${kernel_addr_r} ${kernel_name}; then" \ 164 " setenv fdt_high 0xffffffffffffffff;" \ 165 " setenv initrd_high 0xffffffffffffffff;" \ 166 " load hostfs - ${fdt_addr_r} ${fdtfile};" \ 167 " load hostfs - ${ramdisk_addr_r} ${ramdisk_name};" \ 168 " fdt addr ${fdt_addr_r};" \ 169 " fdt resize;" \ 170 " fdt chosen ${ramdisk_addr_r} ${filesize};" \ 171 " booti $kernel_addr_r - $fdt_addr_r;" \ 172 " fi;" \ 173 "fi\0" 174 #define BOOTENV_DEV_NAME_SMH(devtypeu, devtypel, instance) "smh " 175 176 /* Boot sources for distro boot and load addresses, per board */ 177 178 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO /* Arm Juno board */ 179 180 #define BOOT_TARGET_DEVICES(func) \ 181 func(USB, usb, 0) \ 182 func(SATA, sata, 0) \ 183 func(SATA, sata, 1) \ 184 func(PXE, pxe, na) \ 185 func(DHCP, dhcp, na) \ 186 func(AFS, afs, na) 187 188 #define VEXPRESS_KERNEL_ADDR 0x80080000 189 #define VEXPRESS_PXEFILE_ADDR 0x8fb00000 190 #define VEXPRESS_FDT_ADDR 0x8fc00000 191 #define VEXPRESS_SCRIPT_ADDR 0x8fd00000 192 #define VEXPRESS_RAMDISK_ADDR 0x8fe00000 193 194 #define EXTRA_ENV_NAMES \ 195 "kernel_name=norkern\0" \ 196 "kernel_alt_name=Image\0" \ 197 "ramdisk_name=ramdisk.img\0" \ 198 "fdtfile=board.dtb\0" \ 199 "fdt_alt_name=juno\0" 200 201 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP /* ARMv8-A base model */ 202 203 #define BOOT_TARGET_DEVICES(func) \ 204 func(SMH, smh, na) \ 205 func(MEM, mem, na) \ 206 FUNC_VIRTIO(func) \ 207 func(PXE, pxe, na) \ 208 func(DHCP, dhcp, na) 209 210 #define VEXPRESS_KERNEL_ADDR 0x80080000 211 #define VEXPRESS_PXEFILE_ADDR 0x8fa00000 212 #define VEXPRESS_SCRIPT_ADDR 0x8fb00000 213 #define VEXPRESS_FDT_ADDR 0x8fc00000 214 #define VEXPRESS_BOOT_ADDR 0x8fd00000 215 #define VEXPRESS_RAMDISK_ADDR 0x8fe00000 216 217 #define EXTRA_ENV_NAMES \ 218 "kernel_name=Image\0" \ 219 "ramdisk_name=ramdisk.img\0" \ 220 "fdtfile=devtree.dtb\0" \ 221 "boot_name=boot.img\0" \ 222 "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" 223 224 #elif CONFIG_TARGET_VEXPRESS64_BASER_FVP /* ARMv8-R base model */ 225 226 #define BOOT_TARGET_DEVICES(func) \ 227 func(MEM, mem, na) \ 228 FUNC_VIRTIO(func) \ 229 func(PXE, pxe, na) \ 230 func(DHCP, dhcp, na) 231 232 #define VEXPRESS_KERNEL_ADDR 0x00200000 233 #define VEXPRESS_PXEFILE_ADDR 0x0fb00000 234 #define VEXPRESS_FDT_ADDR 0x0fc00000 235 #define VEXPRESS_SCRIPT_ADDR 0x0fd00000 236 #define VEXPRESS_RAMDISK_ADDR 0x0fe00000 237 238 #define EXTRA_ENV_NAMES \ 239 "kernel_name=Image\0" \ 240 "ramdisk_name=ramdisk.img\0" \ 241 "fdtfile=board.dtb\0" 242 #endif 243 244 #include <config_distro_bootcmd.h> 245 246 /* Default load addresses and names for the different payloads. */ 247 #define CFG_EXTRA_ENV_SETTINGS \ 248 "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ 249 "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ 250 "pxefile_addr_r=" __stringify(VEXPRESS_PXEFILE_ADDR) "\0" \ 251 "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ 252 "scriptaddr=" __stringify(VEXPRESS_SCRIPT_ADDR) "\0" \ 253 EXTRA_ENV_NAMES \ 254 BOOTENV 255 256 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 257 #define CFG_SYS_FLASH_BASE 0x08000000 258 #else 259 #define CFG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000) 260 #endif 261 262 #endif /* __VEXPRESS_AEMV8_H */ 263