1 /*
2 * ARM Power State and Coordination Interface (PSCI) header
3 *
4 * This header holds common PSCI defines and macros shared
5 * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
6 *
7 * Copyright (C) 2014 Linaro Ltd.
8 * Author: Anup Patel <anup.patel@linaro.org>
9 */
10
11 #ifndef _UAPI_LINUX_PSCI_H
12 #define _UAPI_LINUX_PSCI_H
13
14 #include <linux/arm-smccc.h>
15
16 /*
17 * PSCI v0.1 interface
18 *
19 * The PSCI v0.1 function numbers are implementation defined.
20 *
21 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
22 * INVALID_PARAMS, and DENIED defined below are applicable
23 * to PSCI v0.1.
24 */
25
26 /* PSCI v0.2 interface */
27 #define PSCI_0_2_FN_BASE 0x84000000
28 #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n))
29 #define PSCI_0_2_64BIT 0x40000000
30 #define PSCI_0_2_FN64_BASE \
31 (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
32 #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n))
33
34 #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0)
35 #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
36 #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2)
37 #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3)
38 #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4)
39 #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
40 #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6)
41 #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7)
42 #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8)
43 #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9)
44
45 #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
46 #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
47 #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)
48 #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
49 #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7)
50
51 #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10)
52 #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14)
53 #define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15)
54 #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18)
55
56 #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14)
57 #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18)
58
59 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
60 #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff
61 #define PSCI_0_2_POWER_STATE_ID_SHIFT 0
62 #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16
63 #define PSCI_0_2_POWER_STATE_TYPE_MASK \
64 (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT)
65 #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24
66 #define PSCI_0_2_POWER_STATE_AFFL_MASK \
67 (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
68
69 /* PSCI extended power state encoding for CPU_SUSPEND function */
70 #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff
71 #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0
72 #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30
73 #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \
74 (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT)
75
76 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
77 #define PSCI_0_2_AFFINITY_LEVEL_ON 0
78 #define PSCI_0_2_AFFINITY_LEVEL_OFF 1
79 #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2
80
81 /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
82 #define PSCI_0_2_TOS_UP_MIGRATE 0
83 #define PSCI_0_2_TOS_UP_NO_MIGRATE 1
84 #define PSCI_0_2_TOS_MP 2
85
86 /* PSCI version decoding (independent of PSCI version) */
87 #define PSCI_VERSION_MAJOR_SHIFT 16
88 #define PSCI_VERSION_MINOR_MASK \
89 ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
90 #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK
91 #define PSCI_VERSION_MAJOR(ver) \
92 (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
93 #define PSCI_VERSION_MINOR(ver) \
94 ((ver) & PSCI_VERSION_MINOR_MASK)
95 #define PSCI_VERSION(maj, min) \
96 ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \
97 ((min) & PSCI_VERSION_MINOR_MASK))
98
99 /* PSCI features decoding (>=1.0) */
100 #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1
101 #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \
102 (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT)
103
104 #define PSCI_1_0_OS_INITIATED BIT(0)
105 #define PSCI_1_0_SUSPEND_MODE_PC 0
106 #define PSCI_1_0_SUSPEND_MODE_OSI 1
107
108 /* PSCI return values (inclusive of all PSCI versions) */
109 #define PSCI_RET_SUCCESS 0
110 #define PSCI_RET_NOT_SUPPORTED -1
111 #define PSCI_RET_INVALID_PARAMS -2
112 #define PSCI_RET_DENIED -3
113 #define PSCI_RET_ALREADY_ON -4
114 #define PSCI_RET_ON_PENDING -5
115 #define PSCI_RET_INTERNAL_FAILURE -6
116 #define PSCI_RET_NOT_PRESENT -7
117 #define PSCI_RET_DISABLED -8
118 #define PSCI_RET_INVALID_ADDRESS -9
119
120 /**
121 * struct psci_plat_data - PSCI driver platform data
122 * @method: Selected invocation conduit
123 */
124 struct psci_plat_data {
125 void (*invoke_fn)(unsigned long arg0, unsigned long arg1,
126 unsigned long arg2, unsigned long arg3,
127 unsigned long arg4, unsigned long arg5,
128 unsigned long arg6, unsigned long arg7,
129 struct arm_smccc_res *res);
130 };
131
132 #ifdef CONFIG_ARM_PSCI_FW
133 unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1,
134 unsigned long a2, unsigned long a3);
135 void psci_sys_reset(u32 type);
136 void psci_sys_poweroff(void);
137
138 #else
invoke_psci_fn(unsigned long a0,unsigned long a1,unsigned long a2,unsigned long a3)139 static inline unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1,
140 unsigned long a2, unsigned long a3)
141 {
142 return PSCI_RET_DISABLED;
143 }
144 #endif
145
146 #endif /* _UAPI_LINUX_PSCI_H */
147