1System requirements
2===================
3
4The following extensions are expected to be supported by a system on which
5Xen is run:
6- Zbb:
7  RISC-V doesn't have a CLZ instruction in the base ISA.
8  As a consequence, __builtin_ffs() emits a library call to ffs() on GCC,
9  or a de Bruijn sequence on Clang.
10  Zbb extension adds a CLZ instruction, after which __builtin_ffs() emits
11  a very simple sequence.
12  The similar issue occurs with other __builtin_<bitop>, so it is needed to
13  provide a generic version of bitops in RISC-V bitops.h
14- Zihintpause:
15  On a system that doesn't have this extension, cpu_relax() should be
16  implemented properly.
17