1 /*
2 * Based on linux arch/arm/include/asm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 * 05-Oct-2004 BJD Moved memory string functions to use void __iomem
20 */
21 #ifndef _ARM_ARM32_IO_H
22 #define _ARM_ARM32_IO_H
23
24 #include <asm/system.h>
25 #include <asm/byteorder.h>
26
__raw_writeb(u8 val,volatile void __iomem * addr)27 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
28 {
29 asm volatile("strb %1, %0"
30 : "+Qo" (*(volatile u8 __force *)addr)
31 : "r" (val));
32 }
33
__raw_writew(u16 val,volatile void __iomem * addr)34 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
35 {
36 asm volatile("strh %1, %0"
37 : "+Q" (*(volatile u16 __force *)addr)
38 : "r" (val));
39 }
40
__raw_writel(u32 val,volatile void __iomem * addr)41 static inline void __raw_writel(u32 val, volatile void __iomem *addr)
42 {
43 asm volatile("str %1, %0"
44 : "+Qo" (*(volatile u32 __force *)addr)
45 : "r" (val));
46 }
47
__raw_readb(const volatile void __iomem * addr)48 static inline u8 __raw_readb(const volatile void __iomem *addr)
49 {
50 u8 val;
51 asm volatile("ldrb %1, %0"
52 : "+Qo" (*(volatile u8 __force *)addr),
53 "=r" (val));
54 return val;
55 }
56
__raw_readw(const volatile void __iomem * addr)57 static inline u16 __raw_readw(const volatile void __iomem *addr)
58 {
59 u16 val;
60 asm volatile("ldrh %1, %0"
61 : "+Q" (*(volatile u16 __force *)addr),
62 "=r" (val));
63 return val;
64 }
65
__raw_readl(const volatile void __iomem * addr)66 static inline u32 __raw_readl(const volatile void __iomem *addr)
67 {
68 u32 val;
69 asm volatile("ldr %1, %0"
70 : "+Qo" (*(volatile u32 __force *)addr),
71 "=r" (val));
72 return val;
73 }
74
75 #define __iormb() rmb()
76 #define __iowmb() wmb()
77
78 #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
79 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
80 __raw_readw(c)); __r; })
81 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
82 __raw_readl(c)); __r; })
83 /*
84 * ldrd instructions are not decoded by Arm when running as a guest to access
85 * emulated MMIO region. Thus, readq_relaxed_non_atomic() invokes readl_relaxed()
86 * twice to read the lower and upper 32 bits.
87 */
readq_relaxed_non_atomic(const volatile void __iomem * addr)88 static inline u64 readq_relaxed_non_atomic(const volatile void __iomem *addr)
89 {
90 u64 val = (((u64)readl_relaxed(addr + 4)) << 32) | readl_relaxed(addr);
91 return val;
92 }
93
94 #define writeb_relaxed(v,c) __raw_writeb(v,c)
95 #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c)
96 #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
97 /*
98 * strd instructions are not decoded by Arm when running as a guest to access
99 * emulated MMIO region. Thus, writeq_relaxed_non_atomic() invokes writel_relaxed()
100 * twice to write the lower and upper 32 bits.
101 */
writeq_relaxed_non_atomic(u64 val,volatile void __iomem * addr)102 static inline void writeq_relaxed_non_atomic(u64 val, volatile void __iomem *addr)
103 {
104 writel_relaxed((u32)val, addr);
105 writel_relaxed((u32)(val >> 32), addr + 4);
106 }
107
108 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
109 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
110 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
111
112 #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
113 #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
114 #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
115
116 #endif /* _ARM_ARM32_IO_H */
117