Lines Matching refs:ui32Module
98 internal_iom_wait_i2c_scl_hi(uint32_t ui32Module);
254 internal_iom_get_int_err(uint32_t ui32Module, uint32_t ui32IntStatus) in internal_iom_get_int_err() argument
260 ui32IntStatus |= am_hal_iom_int_status_get(ui32Module, false); in internal_iom_get_int_err()
412 internal_iom_wait_i2c_scl_hi(uint32_t ui32Module) in internal_iom_wait_i2c_scl_hi() argument
434 if ( g_I2CPads[index].module == ui32Module ) in internal_iom_wait_i2c_scl_hi()
479 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in internal_iom_wait_i2c_scl_hi()
719 am_hal_iom_pwrctrl_enable(uint32_t ui32Module) in am_hal_iom_pwrctrl_enable() argument
721 am_hal_debug_assert_msg(ui32Module < AM_REG_IOMSTR_NUM_MODULES, in am_hal_iom_pwrctrl_enable()
724 am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_IOM0 << ui32Module); in am_hal_iom_pwrctrl_enable()
737 am_hal_iom_pwrctrl_disable(uint32_t ui32Module) in am_hal_iom_pwrctrl_disable() argument
739 am_hal_debug_assert_msg(ui32Module < AM_REG_IOMSTR_NUM_MODULES, in am_hal_iom_pwrctrl_disable()
742 am_hal_pwrctrl_periph_disable(AM_HAL_PWRCTRL_IOM0 << ui32Module); in am_hal_iom_pwrctrl_disable()
758 am_hal_iom_enable(uint32_t ui32Module) in am_hal_iom_enable() argument
760 if ( ui32Module < AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_enable()
762 AM_REGn(IOMSTR, ui32Module, CFG) |= AM_REG_IOMSTR_CFG_IFCEN(1); in am_hal_iom_enable()
763 g_bIomBusy[ui32Module] = false; in am_hal_iom_enable()
780 am_hal_iom_disable(uint32_t ui32Module) in am_hal_iom_disable() argument
782 if ( ui32Module < AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_disable()
787 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_disable()
792 AM_REGn(IOMSTR, ui32Module, CFG) &= ~(AM_REG_IOMSTR_CFG_IFCEN(1)); in am_hal_iom_disable()
816 am_hal_iom_power_on_restore(uint32_t ui32Module) in am_hal_iom_power_on_restore() argument
818 am_hal_debug_assert_msg(ui32Module < AM_REG_IOMSTR_NUM_MODULES, in am_hal_iom_power_on_restore()
824 if ( am_hal_iom_pwrsave[ui32Module].bValid == 0 ) in am_hal_iom_power_on_restore()
832 am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_IOM0 << ui32Module); in am_hal_iom_power_on_restore()
837 AM_REGn(IOMSTR, ui32Module, FIFOTHR) = am_hal_iom_pwrsave[ui32Module].FIFOTHR; in am_hal_iom_power_on_restore()
838 AM_REGn(IOMSTR, ui32Module, CLKCFG) = am_hal_iom_pwrsave[ui32Module].CLKCFG; in am_hal_iom_power_on_restore()
839 AM_REGn(IOMSTR, ui32Module, CFG) = am_hal_iom_pwrsave[ui32Module].CFG; in am_hal_iom_power_on_restore()
840 AM_REGn(IOMSTR, ui32Module, INTEN) = am_hal_iom_pwrsave[ui32Module].INTEN; in am_hal_iom_power_on_restore()
845 am_hal_iom_pwrsave[ui32Module].bValid = 0; in am_hal_iom_power_on_restore()
868 am_hal_iom_power_off_save(uint32_t ui32Module) in am_hal_iom_power_off_save() argument
870 am_hal_debug_assert_msg(ui32Module < AM_REG_IOMSTR_NUM_MODULES, in am_hal_iom_power_off_save()
876 am_hal_iom_pwrsave[ui32Module].FIFOTHR = AM_REGn(IOMSTR, ui32Module, FIFOTHR); in am_hal_iom_power_off_save()
877 am_hal_iom_pwrsave[ui32Module].CLKCFG = AM_REGn(IOMSTR, ui32Module, CLKCFG); in am_hal_iom_power_off_save()
878 am_hal_iom_pwrsave[ui32Module].CFG = AM_REGn(IOMSTR, ui32Module, CFG); in am_hal_iom_power_off_save()
879 am_hal_iom_pwrsave[ui32Module].INTEN = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_power_off_save()
884 am_hal_iom_pwrsave[ui32Module].bValid = 1; in am_hal_iom_power_off_save()
889 am_hal_pwrctrl_periph_disable(AM_HAL_PWRCTRL_IOM0 << ui32Module); in am_hal_iom_power_off_save()
940 am_hal_iom_config(uint32_t ui32Module, const am_hal_iom_config_t *psConfig) in am_hal_iom_config() argument
950 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_config()
985 AM_REGn(IOMSTR, ui32Module, CFG) = ui32Config; in am_hal_iom_config()
1000 AM_REGn(IOMSTR, ui32Module, FIFOTHR) = in am_hal_iom_config()
1004 AM_REGn(IOMSTR, ui32Module, FIFOTHR) = in am_hal_iom_config()
1015 if ((0 != ui32Module) && (4 != ui32Module) && (6 != ui32Module) && in am_hal_iom_config()
1019 AM_REGn(IOMSTR, ui32Module, CFG) |= AM_REG_IOMSTR_CFG_SPHA_M; in am_hal_iom_config()
1040 AM_REGn(IOMSTR, ui32Module, CLKCFG) = (uint32_t)ui32ClkCfg; in am_hal_iom_config()
1046 ui32StatusTimeout[ui32Module] = MAX_IOM_BITS * AM_HAL_IOM_MAX_FIFO_SIZE * in am_hal_iom_config()
1531 am_hal_iom_spi_write(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_write() argument
1539 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_write()
1544 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_write()
1547 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_write()
1555 if ( g_psIOMQueue[ui32Module].pui8Data != NULL ) in am_hal_iom_spi_write()
1560 ui32Status = am_hal_iom_queue_spi_write(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_spi_write()
1568 am_hal_iom_queue_flush(ui32Module); in am_hal_iom_spi_write()
1570 ui32Status = g_iom_error_status[ui32Module]; in am_hal_iom_spi_write()
1582 ui32Status = am_hal_iom_spi_write_nq(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_spi_write()
1611 am_hal_iom_spi_read(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_read() argument
1619 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_read()
1624 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_read()
1625 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_read()
1628 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_read()
1636 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_read()
1644 if ( g_psIOMQueue[ui32Module].pui8Data != NULL ) in am_hal_iom_spi_read()
1649 ui32Status = am_hal_iom_queue_spi_read(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_spi_read()
1657 am_hal_iom_queue_flush(ui32Module); in am_hal_iom_spi_read()
1659 ui32Status = g_iom_error_status[ui32Module]; in am_hal_iom_spi_read()
1671 ui32Status = am_hal_iom_spi_read_nq(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_spi_read()
1703 am_hal_iom_spi_fullduplex(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_fullduplex() argument
1711 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_fullduplex()
1716 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_fullduplex()
1719 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_fullduplex()
1727 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_OPER; in am_hal_iom_spi_fullduplex()
1738 if ( g_psIOMQueue[ui32Module].pui8Data != NULL ) in am_hal_iom_spi_fullduplex()
1743 ui32Status = am_hal_iom_queue_spi_write(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_spi_fullduplex()
1751 am_hal_iom_queue_flush(ui32Module); in am_hal_iom_spi_fullduplex()
1753 ui32Status = g_iom_error_status[ui32Module]; in am_hal_iom_spi_fullduplex()
1766 ui32Status = am_hal_iom_spi_fullduplex_nq(ui32Module, ui32ChipSelect, in am_hal_iom_spi_fullduplex()
1801 am_hal_iom_spi_write_nq(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_write_nq() argument
1815 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_write_nq()
1822 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_spi_write_nq()
1825 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_write_nq()
1828 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_write_nq()
1837 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_write_nq()
1841 ui32MaxFifoSize = ((0 == AM_BFRn(IOMSTR, ui32Module, CFG, FULLDUP)) ? in am_hal_iom_spi_write_nq()
1846 ui32IntConfig = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_spi_write_nq()
1847 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_write_nq()
1849 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_write_nq()
1859 if ( WORKAROUND_IOM == ui32Module && isRevB0() ) in am_hal_iom_spi_write_nq()
1883 am_hal_iom_fifo_write(ui32Module, pui32Data, ui32TransferSize); in am_hal_iom_spi_write_nq()
1888 am_hal_iom_spi_cmd_run(AM_HAL_IOM_WRITE, ui32Module, ui32ChipSelect, in am_hal_iom_spi_write_nq()
1901 while ( ui32NumBytes && !AM_BFRn(IOMSTR, ui32Module, INTSTAT, CMDCMP) ) in am_hal_iom_spi_write_nq()
1906 ui32SpaceInFifo = am_hal_iom_fifo_empty_slots(ui32Module); in am_hal_iom_spi_write_nq()
1928 am_hal_iom_fifo_write(ui32Module, pui32Data, ui32TransferSize); in am_hal_iom_spi_write_nq()
1940 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_spi_write_nq()
1941 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_spi_write_nq()
1946 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_spi_write_nq()
1950 g_iom_error_status[ui32Module] = ui32Status = internal_iom_get_int_err(ui32Module, 0); in am_hal_iom_spi_write_nq()
1957 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_write_nq()
1958 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_spi_write_nq()
1986 am_hal_iom_spi_read_nq(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_read_nq() argument
1999 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_read_nq()
2006 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_spi_read_nq()
2009 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_read_nq()
2012 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_read_nq()
2020 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_read_nq()
2027 ui32IntConfig = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_spi_read_nq()
2032 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_read_nq()
2035 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_read_nq()
2046 if ( (WORKAROUND_IOM == ui32Module) && !(ui32Options & AM_HAL_IOM_RAW) && in am_hal_iom_spi_read_nq()
2061 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_spi_read_nq()
2062 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_spi_read_nq()
2067 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_spi_read_nq()
2072 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_read_nq()
2073 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_spi_read_nq()
2078 AM_BFWn(IOMSTR, ui32Module, INTCLR, CMDCMP, 1); in am_hal_iom_spi_read_nq()
2081 am_hal_iom_spi_cmd_run(AM_HAL_IOM_READ, ui32Module, ui32ChipSelect, in am_hal_iom_spi_read_nq()
2089 ui32BytesInFifo = am_hal_iom_fifo_full_slots(ui32Module); in am_hal_iom_spi_read_nq()
2097 am_hal_iom_fifo_read(ui32Module, pui32Data, ui32NumBytes); in am_hal_iom_spi_read_nq()
2106 am_hal_iom_fifo_read(ui32Module, pui32Data, ui32BytesInFifo & ~0x3); in am_hal_iom_spi_read_nq()
2118 bCmdCmp = AM_BFRn(IOMSTR, ui32Module, INTSTAT, CMDCMP); in am_hal_iom_spi_read_nq()
2124 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_spi_read_nq()
2125 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_spi_read_nq()
2130 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_spi_read_nq()
2134 g_iom_error_status[ui32Module] = ui32Status = internal_iom_get_int_err(ui32Module, 0); in am_hal_iom_spi_read_nq()
2141 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_read_nq()
2142 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_spi_read_nq()
2174 am_hal_iom_spi_fullduplex_nq(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_fullduplex_nq() argument
2189 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_fullduplex_nq()
2196 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_spi_fullduplex_nq()
2199 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_fullduplex_nq()
2202 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_fullduplex_nq()
2211 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_fullduplex_nq()
2220 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_OPER; in am_hal_iom_spi_fullduplex_nq()
2227 AM_REGn(IOMSTR, ui32Module, CFG) |= AM_REG_IOMSTR_CFG_FULLDUP_FULLDUP; in am_hal_iom_spi_fullduplex_nq()
2229 ui32MaxFifoSize = ((0 == AM_BFRn(IOMSTR, ui32Module, CFG, FULLDUP)) ? in am_hal_iom_spi_fullduplex_nq()
2234 ui32IntConfig = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_spi_fullduplex_nq()
2235 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_fullduplex_nq()
2237 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_fullduplex_nq()
2247 am_hal_iom_fifo_write(ui32Module, pui32TxData, ui32TransferSize); in am_hal_iom_spi_fullduplex_nq()
2252 am_hal_iom_spi_cmd_run(AM_HAL_IOM_WRITE, ui32Module, ui32ChipSelect, in am_hal_iom_spi_fullduplex_nq()
2268 while (am_hal_iom_fifo_full_slots(ui32Module) > 0); in am_hal_iom_spi_fullduplex_nq()
2270 am_hal_iom_fifo_read(ui32Module, pui32RxData, ui32TransferSize); in am_hal_iom_spi_fullduplex_nq()
2277 ui32SpaceInFifo = am_hal_iom_fifo_empty_slots(ui32Module); in am_hal_iom_spi_fullduplex_nq()
2299 am_hal_iom_fifo_write(ui32Module, pui32TxData, ui32TransferSize); in am_hal_iom_spi_fullduplex_nq()
2316 bCmdCmp = AM_BFRn(IOMSTR, ui32Module, INTSTAT, CMDCMP); in am_hal_iom_spi_fullduplex_nq()
2323 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_spi_fullduplex_nq()
2324 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_spi_fullduplex_nq()
2329 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_spi_fullduplex_nq()
2333 g_iom_error_status[ui32Module] = ui32Status = internal_iom_get_int_err(ui32Module, 0); in am_hal_iom_spi_fullduplex_nq()
2340 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_fullduplex_nq()
2341 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_spi_fullduplex_nq()
2346 AM_REGn(IOMSTR, ui32Module, CFG) &= ~AM_REG_IOMSTR_CFG_FULLDUP_FULLDUP; in am_hal_iom_spi_fullduplex_nq()
2388 am_hal_iom_spi_write_nb(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_write_nb() argument
2400 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_write_nb()
2407 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_spi_write_nb()
2410 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_write_nb()
2413 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_write_nb()
2421 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_write_nb()
2425 ui32MaxFifoSize = ((0 == AM_BFRn(IOMSTR, ui32Module, CFG, FULLDUP)) ? in am_hal_iom_spi_write_nb()
2433 g_bIomBusy[ui32Module] = true; in am_hal_iom_spi_write_nb()
2436 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_write_nb()
2441 if ( WORKAROUND_IOM == ui32Module && isRevB0() ) in am_hal_iom_spi_write_nb()
2453 g_psIOMBuffers[ui32Module].ui32State = BUFFER_SENDING; in am_hal_iom_spi_write_nb()
2454 g_psIOMBuffers[ui32Module].pui32Data = pui32Data + (ui32TransferSize / 4); in am_hal_iom_spi_write_nb()
2455 g_psIOMBuffers[ui32Module].ui32BytesLeft = ui32NumBytes - ui32TransferSize; in am_hal_iom_spi_write_nb()
2456 g_psIOMBuffers[ui32Module].pfnCallback = pfnCallback; in am_hal_iom_spi_write_nb()
2457 g_psIOMBuffers[ui32Module].ui32Options = ui32Options; in am_hal_iom_spi_write_nb()
2475 if ( am_hal_iom_fifo_write(ui32Module, pui32Data, ui32TransferSize) > 0 ) in am_hal_iom_spi_write_nb()
2480 g_psIOMBuffers[ui32Module].ui32State = BUFFER_SENDING; in am_hal_iom_spi_write_nb()
2481 g_psIOMBuffers[ui32Module].pui32Data = pui32Data; in am_hal_iom_spi_write_nb()
2482 g_psIOMBuffers[ui32Module].ui32BytesLeft = ui32NumBytes; in am_hal_iom_spi_write_nb()
2483 g_psIOMBuffers[ui32Module].pfnCallback = pfnCallback; in am_hal_iom_spi_write_nb()
2484 g_psIOMBuffers[ui32Module].ui32Options = ui32Options; in am_hal_iom_spi_write_nb()
2490 g_psIOMBuffers[ui32Module].ui32BytesLeft -= ui32TransferSize; in am_hal_iom_spi_write_nb()
2491 g_psIOMBuffers[ui32Module].pui32Data += (ui32TransferSize / 4); in am_hal_iom_spi_write_nb()
2496 am_hal_iom_spi_cmd_run(AM_HAL_IOM_WRITE, ui32Module, ui32ChipSelect, in am_hal_iom_spi_write_nb()
2537 am_hal_iom_spi_read_nb(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_spi_read_nb() argument
2549 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_spi_read_nb()
2556 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_spi_read_nb()
2558 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_spi_read_nb()
2561 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_read_nb()
2569 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_spi_read_nb()
2579 g_bIomBusy[ui32Module] = true; in am_hal_iom_spi_read_nb()
2582 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_read_nb()
2593 if ( (WORKAROUND_IOM == ui32Module) && !(ui32Options & AM_HAL_IOM_RAW) && in am_hal_iom_spi_read_nb()
2617 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_spi_read_nb()
2618 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_spi_read_nb()
2623 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_spi_read_nb()
2631 g_bIomBusy[ui32Module] = true; in am_hal_iom_spi_read_nb()
2636 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_spi_read_nb()
2643 g_psIOMBuffers[ui32Module].ui32State = BUFFER_RECEIVING; in am_hal_iom_spi_read_nb()
2644 g_psIOMBuffers[ui32Module].pui32Data = pui32Data; in am_hal_iom_spi_read_nb()
2645 g_psIOMBuffers[ui32Module].ui32BytesLeft = ui32NumBytes; in am_hal_iom_spi_read_nb()
2646 g_psIOMBuffers[ui32Module].pfnCallback = pfnCallback; in am_hal_iom_spi_read_nb()
2647 g_psIOMBuffers[ui32Module].ui32Options = ui32Options; in am_hal_iom_spi_read_nb()
2652 am_hal_iom_spi_cmd_run(AM_HAL_IOM_READ, ui32Module, ui32ChipSelect, in am_hal_iom_spi_read_nb()
2707 am_hal_iom_spi_cmd_run(uint32_t ui32Operation, uint32_t ui32Module, in am_hal_iom_spi_cmd_run() argument
2722 AM_REGn(IOMSTR, ui32Module, CMD) = ui32Command; in am_hal_iom_spi_cmd_run()
2754 am_hal_iom_i2c_write_nq(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_i2c_write_nq() argument
2769 if ( ui32Module > AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_write_nq()
2776 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_i2c_write_nq()
2779 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_write_nq()
2782 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_write_nq()
2790 if ( ui32Module == AM_HAL_IOM_I2CBB_MODULE ) in am_hal_iom_i2c_write_nq()
2810 g_iom_error_status[ui32Module] = ui32Status = i2c_bb_errmap[i2cBBStatus]; in am_hal_iom_i2c_write_nq()
2819 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_write_nq()
2823 ui32MaxFifoSize = ((0 == AM_BFRn(IOMSTR, ui32Module, CFG, FULLDUP)) ? in am_hal_iom_i2c_write_nq()
2829 ui32IntConfig = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_i2c_write_nq()
2830 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_i2c_write_nq()
2833 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_write_nq()
2841 am_hal_iom_fifo_write(ui32Module, pui32Data, ui32TransferSize); in am_hal_iom_i2c_write_nq()
2846 ui32Status = am_hal_iom_i2c_cmd_run(AM_HAL_IOM_WRITE, ui32Module, ui32BusAddress, in am_hal_iom_i2c_write_nq()
2851 g_iom_error_status[ui32Module] = ui32Status = ui32Status; in am_hal_iom_i2c_write_nq()
2856 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_write_nq()
2857 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_i2c_write_nq()
2869 while ( ui32NumBytes && !AM_BFRn(IOMSTR, ui32Module, INTSTAT, CMDCMP) ) in am_hal_iom_i2c_write_nq()
2874 ui32SpaceInFifo = am_hal_iom_fifo_empty_slots(ui32Module); in am_hal_iom_i2c_write_nq()
2896 am_hal_iom_fifo_write(ui32Module, pui32Data, ui32TransferSize); in am_hal_iom_i2c_write_nq()
2908 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_i2c_write_nq()
2909 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_i2c_write_nq()
2914 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_i2c_write_nq()
2918 g_iom_error_status[ui32Module] = ui32Status = internal_iom_get_int_err(ui32Module, 0); in am_hal_iom_i2c_write_nq()
2925 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_write_nq()
2926 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_i2c_write_nq()
2955 am_hal_iom_i2c_read_nq(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_i2c_read_nq() argument
2969 if ( ui32Module > AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_read_nq()
2976 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_i2c_read_nq()
2979 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_read_nq()
2982 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_read_nq()
2990 if ( ui32Module == AM_HAL_IOM_I2CBB_MODULE ) in am_hal_iom_i2c_read_nq()
3010 g_iom_error_status[ui32Module] = ui32Status = i2c_bb_errmap[i2cBBStatus]; in am_hal_iom_i2c_read_nq()
3019 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_read_nq()
3026 ui32IntConfig = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_i2c_read_nq()
3027 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_i2c_read_nq()
3030 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_read_nq()
3032 ui32Status = am_hal_iom_i2c_cmd_run(AM_HAL_IOM_READ, ui32Module, ui32BusAddress, in am_hal_iom_i2c_read_nq()
3037 g_iom_error_status[ui32Module] = ui32Status = ui32Status; in am_hal_iom_i2c_read_nq()
3042 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_read_nq()
3043 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_i2c_read_nq()
3052 ui32BytesInFifo = am_hal_iom_fifo_full_slots(ui32Module); in am_hal_iom_i2c_read_nq()
3060 am_hal_iom_fifo_read(ui32Module, pui32Data, ui32NumBytes); in am_hal_iom_i2c_read_nq()
3069 am_hal_iom_fifo_read(ui32Module, pui32Data, ui32BytesInFifo & ~0x3); in am_hal_iom_i2c_read_nq()
3081 bCmdCmp = AM_BFRn(IOMSTR, ui32Module, INTSTAT, CMDCMP); in am_hal_iom_i2c_read_nq()
3087 waitStatus = am_hal_flash_delay_status_change(ui32StatusTimeout[ui32Module], in am_hal_iom_i2c_read_nq()
3088 AM_REG_IOMSTRn(ui32Module) + AM_REG_IOMSTR_INTSTAT_O, in am_hal_iom_i2c_read_nq()
3093 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_TIMEOUT; in am_hal_iom_i2c_read_nq()
3097 g_iom_error_status[ui32Module] = ui32Status = internal_iom_get_int_err(ui32Module, 0); in am_hal_iom_i2c_read_nq()
3103 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_read_nq()
3104 AM_REGn(IOMSTR, ui32Module, INTEN) = ui32IntConfig; in am_hal_iom_i2c_read_nq()
3127 am_hal_iom_i2c_write(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_i2c_write() argument
3136 if ( ui32Module > AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_write()
3143 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_i2c_write()
3146 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_write()
3149 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_write()
3157 if ( ui32Module == AM_HAL_IOM_I2CBB_MODULE ) in am_hal_iom_i2c_write()
3177 g_iom_error_status[ui32Module] = ui32Status = i2c_bb_errmap[i2cBBStatus]; in am_hal_iom_i2c_write()
3186 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_write()
3194 if ( g_psIOMQueue[ui32Module].pui8Data != NULL ) in am_hal_iom_i2c_write()
3199 ui32Status = am_hal_iom_queue_i2c_write(ui32Module, ui32BusAddress, pui32Data, in am_hal_iom_i2c_write()
3207 am_hal_iom_queue_flush(ui32Module); in am_hal_iom_i2c_write()
3209 ui32Status = g_iom_error_status[ui32Module]; in am_hal_iom_i2c_write()
3221 ui32Status = am_hal_iom_i2c_write_nq(ui32Module, ui32BusAddress, pui32Data, in am_hal_iom_i2c_write()
3259 am_hal_iom_i2c_read(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_i2c_read() argument
3268 if ( ui32Module > AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_read()
3275 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_i2c_read()
3278 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_read()
3281 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_read()
3289 if ( ui32Module == AM_HAL_IOM_I2CBB_MODULE ) in am_hal_iom_i2c_read()
3309 g_iom_error_status[ui32Module] = ui32Status = i2c_bb_errmap[i2cBBStatus]; in am_hal_iom_i2c_read()
3318 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_read()
3326 if ( g_psIOMQueue[ui32Module].pui8Data != NULL ) in am_hal_iom_i2c_read()
3331 ui32Status = am_hal_iom_queue_i2c_read(ui32Module, ui32BusAddress, pui32Data, in am_hal_iom_i2c_read()
3339 am_hal_iom_queue_flush(ui32Module); in am_hal_iom_i2c_read()
3341 ui32Status = g_iom_error_status[ui32Module]; in am_hal_iom_i2c_read()
3353 ui32Status = am_hal_iom_i2c_read_nq(ui32Module, ui32BusAddress, pui32Data, in am_hal_iom_i2c_read()
3396 am_hal_iom_i2c_write_nb(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_i2c_write_nb() argument
3409 if ( ui32Module > AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_write_nb()
3416 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_i2c_write_nb()
3419 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_write_nb()
3422 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_write_nb()
3430 if ( ui32Module == AM_HAL_IOM_I2CBB_MODULE ) in am_hal_iom_i2c_write_nb()
3433 g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_write_nb()
3452 g_iom_error_status[ui32Module] = ui32Status = i2c_bb_errmap[i2cBBStatus]; in am_hal_iom_i2c_write_nb()
3470 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_write_nb()
3474 ui32MaxFifoSize = ((0 == AM_BFRn(IOMSTR, ui32Module, CFG, FULLDUP)) ? in am_hal_iom_i2c_write_nb()
3486 g_bIomBusy[ui32Module] = true; in am_hal_iom_i2c_write_nb()
3489 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_write_nb()
3491 if ( am_hal_iom_fifo_write(ui32Module, pui32Data, ui32TransferSize) > 0 ) in am_hal_iom_i2c_write_nb()
3496 g_psIOMBuffers[ui32Module].ui32State = BUFFER_SENDING; in am_hal_iom_i2c_write_nb()
3497 g_psIOMBuffers[ui32Module].pui32Data = pui32Data; in am_hal_iom_i2c_write_nb()
3498 g_psIOMBuffers[ui32Module].ui32BytesLeft = ui32NumBytes; in am_hal_iom_i2c_write_nb()
3499 g_psIOMBuffers[ui32Module].pfnCallback = pfnCallback; in am_hal_iom_i2c_write_nb()
3505 g_psIOMBuffers[ui32Module].ui32BytesLeft -= ui32TransferSize; in am_hal_iom_i2c_write_nb()
3506 g_psIOMBuffers[ui32Module].pui32Data += (ui32TransferSize / 4); in am_hal_iom_i2c_write_nb()
3511 ui32Status = am_hal_iom_i2c_cmd_run(AM_HAL_IOM_WRITE, ui32Module, ui32BusAddress, in am_hal_iom_i2c_write_nb()
3515 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_i2c_write_nb()
3555 am_hal_iom_i2c_read_nb(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_i2c_read_nb() argument
3565 if ( ui32Module > AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_read_nb()
3572 am_hal_iom_poll_complete(ui32Module); in am_hal_iom_i2c_read_nb()
3575 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_read_nb()
3578 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_read_nb()
3586 if ( ui32Module == AM_HAL_IOM_I2CBB_MODULE ) in am_hal_iom_i2c_read_nb()
3589 g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_i2c_read_nb()
3608 g_iom_error_status[ui32Module] = ui32Status = i2c_bb_errmap[i2cBBStatus]; in am_hal_iom_i2c_read_nb()
3627 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_i2c_read_nb()
3635 g_bIomBusy[ui32Module] = true; in am_hal_iom_i2c_read_nb()
3638 AM_REGn(IOMSTR, ui32Module, INTCLR) = AM_HAL_IOM_INT_ALL; in am_hal_iom_i2c_read_nb()
3643 g_psIOMBuffers[ui32Module].ui32State = BUFFER_RECEIVING; in am_hal_iom_i2c_read_nb()
3644 g_psIOMBuffers[ui32Module].pui32Data = pui32Data; in am_hal_iom_i2c_read_nb()
3645 g_psIOMBuffers[ui32Module].ui32BytesLeft = ui32NumBytes; in am_hal_iom_i2c_read_nb()
3646 g_psIOMBuffers[ui32Module].pfnCallback = pfnCallback; in am_hal_iom_i2c_read_nb()
3651 ui32Status = am_hal_iom_i2c_cmd_run(AM_HAL_IOM_READ, ui32Module, ui32BusAddress, in am_hal_iom_i2c_read_nb()
3655 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_i2c_read_nb()
3680 am_hal_iom_i2c_cmd_run(uint32_t ui32Operation, uint32_t ui32Module, in am_hal_iom_i2c_cmd_run() argument
3690 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_i2c_cmd_run()
3726 ui32Status = internal_iom_wait_i2c_scl_hi(ui32Module); in am_hal_iom_i2c_cmd_run()
3733 AM_REGn(IOMSTR, ui32Module, CMD) = ui32Command; in am_hal_iom_i2c_cmd_run()
3783 am_hal_iom_command_repeat_set(uint32_t ui32Module, uint32_t ui32CmdCount) in am_hal_iom_command_repeat_set() argument
3788 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_command_repeat_set()
3793 AM_REGn(IOMSTR, ui32Module, CMDRPT) = ui32CmdCount; in am_hal_iom_command_repeat_set()
3828 am_hal_iom_fifo_write(uint32_t ui32Module, uint32_t *pui32Data, in am_hal_iom_fifo_write() argument
3836 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_fifo_write()
3844 am_hal_debug_assert_msg((am_hal_iom_fifo_empty_slots(ui32Module) >= ui32NumBytes), in am_hal_iom_fifo_write()
3856 AM_REGn(IOMSTR, ui32Module, FIFO) = pui32Data[ui32Index]; in am_hal_iom_fifo_write()
3882 am_hal_iom_fifo_read(uint32_t ui32Module, uint32_t *pui32Data, in am_hal_iom_fifo_read() argument
3892 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_fifo_read()
3901 …if ( AM_REG_IOMSTR_CFG_FULLDUP_NORMAL == (AM_REGn(IOMSTR, ui32Module, CFG) & AM_REG_IOMSTR_CFG_FUL… in am_hal_iom_fifo_read()
3903 am_hal_debug_assert_msg((am_hal_iom_fifo_full_slots(ui32Module) >= ui32NumBytes), in am_hal_iom_fifo_read()
3922 pui32Data[i] = AM_REGn(IOMSTR, ui32Module, FIFO); in am_hal_iom_fifo_read()
3939 sTempBuffer.words[0] = AM_REGn(IOMSTR, ui32Module, FIFO); in am_hal_iom_fifo_read()
3967 am_hal_iom_fifo_empty_slots(uint32_t ui32Module) in am_hal_iom_fifo_empty_slots() argument
3974 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_fifo_empty_slots()
3979 …ui32MaxFifoSize = ((0 == AM_BFRn(IOMSTR, ui32Module, CFG, FULLDUP)) ? AM_HAL_IOM_MAX_FIFO_SIZE : A… in am_hal_iom_fifo_empty_slots()
3986 return (ui32MaxFifoSize - AM_BFRn(IOMSTR, ui32Module, FIFOPTR, FIFOSIZ)) & (~0x3); in am_hal_iom_fifo_empty_slots()
4001 am_hal_iom_fifo_full_slots(uint32_t ui32Module) in am_hal_iom_fifo_full_slots() argument
4006 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_fifo_full_slots()
4011 return AM_BFRn(IOMSTR, ui32Module, FIFOPTR, FIFOSIZ); in am_hal_iom_fifo_full_slots()
4026 am_hal_iom_poll_complete(uint32_t ui32Module) in am_hal_iom_poll_complete() argument
4031 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_poll_complete()
4039 while ( g_bIomBusy[ui32Module] ); in am_hal_iom_poll_complete()
4054 am_hal_iom_status_get(uint32_t ui32Module) in am_hal_iom_status_get() argument
4059 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_status_get()
4064 return AM_REGn(IOMSTR, ui32Module, STATUS); in am_hal_iom_status_get()
4086 am_hal_iom_error_status_get(uint32_t ui32Module) in am_hal_iom_error_status_get() argument
4091 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_error_status_get()
4099 return (g_iom_error_status[ui32Module]); in am_hal_iom_error_status_get()
4116 am_hal_iom_int_service(uint32_t ui32Module, uint32_t ui32Status) in am_hal_iom_int_service() argument
4126 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_service()
4133 psBuffer = &g_psIOMBuffers[ui32Module]; in am_hal_iom_int_service()
4137 g_iom_error_status[ui32Module] |= ui32Status; in am_hal_iom_int_service()
4146 g_bIomBusy[ui32Module] = false; in am_hal_iom_int_service()
4166 ui32NumBytes = am_hal_iom_fifo_full_slots(ui32Module); in am_hal_iom_int_service()
4167 am_hal_iom_fifo_read(ui32Module, psBuffer->pui32Data, ui32NumBytes); in am_hal_iom_int_service()
4176 …g_iom_error_status[ui32Module] = internal_iom_get_int_err(ui32Module, g_iom_error_status[ui32Modul… in am_hal_iom_int_service()
4201 thresh = AM_BFRn(IOMSTR, ui32Module, FIFOTHR, FIFOWTHR); in am_hal_iom_int_service()
4204 ui32SpaceInFifo = am_hal_iom_fifo_empty_slots(ui32Module); in am_hal_iom_int_service()
4228 am_hal_iom_fifo_write(ui32Module, psBuffer->pui32Data, ui32NumBytes); in am_hal_iom_int_service()
4232 AM_BFWn(IOMSTR, ui32Module, INTCLR, THR, 1); in am_hal_iom_int_service()
4246 } while ( am_hal_iom_fifo_full_slots(ui32Module) <= thresh ); in am_hal_iom_int_service()
4250 thresh = AM_BFRn(IOMSTR, ui32Module, FIFOTHR, FIFORTHR); in am_hal_iom_int_service()
4251 while ( (ui32NumBytes = am_hal_iom_fifo_full_slots(ui32Module)) >= thresh ) in am_hal_iom_int_service()
4263 am_hal_iom_fifo_read(ui32Module, psBuffer->pui32Data, in am_hal_iom_int_service()
4276 am_hal_iom_fifo_read(ui32Module, psBuffer->pui32Data, ui32NumBytes); in am_hal_iom_int_service()
4286 AM_BFWn(IOMSTR, ui32Module, INTCLR, THR, 1); in am_hal_iom_int_service()
4336 am_hal_iom_queue_init(uint32_t ui32Module, am_hal_iom_queue_entry_t *psQueueMemory, in am_hal_iom_queue_init() argument
4342 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_init()
4347 am_hal_queue_init(&g_psIOMQueue[ui32Module], psQueueMemory, in am_hal_iom_queue_init()
4364 am_hal_iom_queue_length_get(uint32_t ui32Module) in am_hal_iom_queue_length_get() argument
4369 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_length_get()
4374 return am_hal_queue_data_left(&g_psIOMQueue[ui32Module]); in am_hal_iom_queue_length_get()
4392 am_hal_iom_queue_start_next_msg(uint32_t ui32Module) in am_hal_iom_queue_start_next_msg() argument
4408 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_start_next_msg()
4421 if ( am_hal_queue_item_get(&g_psIOMQueue[ui32Module], &sIOMTransaction, 1) ) in am_hal_iom_queue_start_next_msg()
4439 ui32Status = am_hal_iom_spi_write_nb(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_queue_start_next_msg()
4444 ui32Status = am_hal_iom_spi_read_nb(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_queue_start_next_msg()
4449 ui32Status = am_hal_iom_i2c_write_nb(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_queue_start_next_msg()
4454 ui32Status = am_hal_iom_i2c_read_nb(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_queue_start_next_msg()
4468 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_queue_start_next_msg()
4509 am_hal_iom_queue_spi_write(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_queue_spi_write() argument
4519 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_spi_write()
4524 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_queue_spi_write()
4527 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_queue_spi_write()
4543 if ( (g_bIomBusy[ui32Module] == false) && in am_hal_iom_queue_spi_write()
4544 am_hal_queue_empty(&g_psIOMQueue[ui32Module]) ) in am_hal_iom_queue_spi_write()
4549 ui32Status = am_hal_iom_spi_write_nb(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_queue_spi_write()
4560 sIOMTransaction.ui32Module = ui32Module; in am_hal_iom_queue_spi_write()
4570 if ( am_hal_queue_item_add(&g_psIOMQueue[ui32Module], &sIOMTransaction, 1) == false ) in am_hal_iom_queue_spi_write()
4581 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_queue_spi_write()
4625 am_hal_iom_queue_spi_read(uint32_t ui32Module, uint32_t ui32ChipSelect, in am_hal_iom_queue_spi_read() argument
4635 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_spi_read()
4640 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_queue_spi_read()
4643 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_queue_spi_read()
4658 if ( (g_bIomBusy[ui32Module] == false) && in am_hal_iom_queue_spi_read()
4659 am_hal_queue_empty(&g_psIOMQueue[ui32Module]) ) in am_hal_iom_queue_spi_read()
4664 ui32Status = am_hal_iom_spi_read_nb(ui32Module, ui32ChipSelect, pui32Data, in am_hal_iom_queue_spi_read()
4675 sIOMTransaction.ui32Module = ui32Module; in am_hal_iom_queue_spi_read()
4685 if ( am_hal_queue_item_add(&g_psIOMQueue[ui32Module], &sIOMTransaction, 1) == false ) in am_hal_iom_queue_spi_read()
4696 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_queue_spi_read()
4740 am_hal_iom_queue_i2c_write(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_queue_i2c_write() argument
4750 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_i2c_write()
4755 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_queue_i2c_write()
4758 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_queue_i2c_write()
4774 if ( (g_bIomBusy[ui32Module] == false) && in am_hal_iom_queue_i2c_write()
4775 am_hal_queue_empty(&g_psIOMQueue[ui32Module]) ) in am_hal_iom_queue_i2c_write()
4780 ui32Status = am_hal_iom_i2c_write_nb(ui32Module, ui32BusAddress, pui32Data, in am_hal_iom_queue_i2c_write()
4791 sIOMTransaction.ui32Module = ui32Module; in am_hal_iom_queue_i2c_write()
4801 if ( am_hal_queue_item_add(&g_psIOMQueue[ui32Module], &sIOMTransaction, 1) == false ) in am_hal_iom_queue_i2c_write()
4812 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_queue_i2c_write()
4856 am_hal_iom_queue_i2c_read(uint32_t ui32Module, uint32_t ui32BusAddress, in am_hal_iom_queue_i2c_read() argument
4866 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_i2c_read()
4871 ui32Status = g_iom_error_status[ui32Module] = AM_HAL_IOM_SUCCESS; in am_hal_iom_queue_i2c_read()
4874 g_iom_error_status[ui32Module] = ui32Status = AM_HAL_IOM_ERR_INVALID_PARAM; in am_hal_iom_queue_i2c_read()
4890 if ( (g_bIomBusy[ui32Module] == false) && in am_hal_iom_queue_i2c_read()
4891 am_hal_queue_empty(&g_psIOMQueue[ui32Module]) ) in am_hal_iom_queue_i2c_read()
4896 ui32Status = am_hal_iom_i2c_read_nb(ui32Module, ui32BusAddress, pui32Data, in am_hal_iom_queue_i2c_read()
4907 sIOMTransaction.ui32Module = ui32Module; in am_hal_iom_queue_i2c_read()
4917 if ( am_hal_queue_item_add(&g_psIOMQueue[ui32Module], &sIOMTransaction, 1) == false ) in am_hal_iom_queue_i2c_read()
4928 g_iom_error_status[ui32Module] = ui32Status; in am_hal_iom_queue_i2c_read()
4958 am_hal_iom_sleeping_queue_flush(uint32_t ui32Module) in am_hal_iom_sleeping_queue_flush() argument
4966 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_sleeping_queue_flush()
4984 if ( (g_bIomBusy[ui32Module] == false) && in am_hal_iom_sleeping_queue_flush()
4985 am_hal_queue_empty(&g_psIOMQueue[ui32Module]) ) in am_hal_iom_sleeping_queue_flush()
5055 am_hal_iom_queue_service(uint32_t ui32Module, uint32_t ui32Status) in am_hal_iom_queue_service() argument
5060 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_queue_service()
5068 am_hal_iom_int_service(ui32Module, ui32Status); in am_hal_iom_queue_service()
5077 if ( g_psIOMQueue[ui32Module].pui8Data != NULL ) in am_hal_iom_queue_service()
5079 am_hal_iom_queue_start_next_msg(ui32Module); in am_hal_iom_queue_service()
5097 am_hal_iom_int_enable(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_iom_int_enable() argument
5102 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_enable()
5107 AM_REGn(IOMSTR, ui32Module, INTEN) |= ui32Interrupt; in am_hal_iom_int_enable()
5122 am_hal_iom_int_enable_get(uint32_t ui32Module) in am_hal_iom_int_enable_get() argument
5127 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_enable_get()
5132 return AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_int_enable_get()
5148 am_hal_iom_int_disable(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_iom_int_disable() argument
5153 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_disable()
5158 AM_REGn(IOMSTR, ui32Module, INTEN) &= ~ui32Interrupt; in am_hal_iom_int_disable()
5174 am_hal_iom_int_clear(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_iom_int_clear() argument
5179 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_clear()
5184 AM_REGn(IOMSTR, ui32Module, INTCLR) = ui32Interrupt; in am_hal_iom_int_clear()
5200 am_hal_iom_int_set(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_iom_int_set() argument
5205 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_set()
5210 AM_REGn(IOMSTR, ui32Module, INTSET) = ui32Interrupt; in am_hal_iom_int_set()
5226 am_hal_iom_int_status_get(uint32_t ui32Module, bool bEnabledOnly) in am_hal_iom_int_status_get() argument
5231 if ( ui32Module >= AM_REG_IOMSTR_NUM_MODULES ) in am_hal_iom_int_status_get()
5238 uint32_t u32RetVal = AM_REGn(IOMSTR, ui32Module, INTSTAT); in am_hal_iom_int_status_get()
5239 return u32RetVal & AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_int_status_get()
5243 return AM_REGn(IOMSTR, ui32Module, INTSTAT); in am_hal_iom_int_status_get()