Lines Matching refs:ui32Module
77 config_baudrate(uint32_t ui32Module, uint32_t ui32Baudrate, uint32_t ui32UartClkFreq) in config_baudrate() argument
102 AM_REGn(UART, ui32Module, IBRD) = ui32IntegerDivisor; in config_baudrate()
103 AM_REGn(UART, ui32Module, IBRD) = ui32IntegerDivisor; in config_baudrate()
104 AM_REGn(UART, ui32Module, FBRD) = ui32FractionDivisor; in config_baudrate()
120 am_hal_uart_config(uint32_t ui32Module, am_hal_uart_config_t *psConfig) in am_hal_uart_config() argument
128 config_baudrate(ui32Module, psConfig->ui32BaudRate, am_hal_clkgen_sysclk_get()); in am_hal_uart_config()
148 AM_REGn(UART, ui32Module, LCRH) |= ui32ConfigVal; in am_hal_uart_config()
153 AM_REGn(UART, ui32Module, CR) |= psConfig->ui32FlowCtrl; in am_hal_uart_config()
158 AM_REGn(UART, ui32Module, CR) |= AM_REG_UART_CR_CLKSEL_24MHZ; in am_hal_uart_config()
171 am_hal_uart_status_get(uint32_t ui32Module) in am_hal_uart_status_get() argument
176 return AM_REGn(UART, ui32Module, RSR); in am_hal_uart_status_get()
207 am_hal_uart_int_status_get(uint32_t ui32Module, bool bEnabledOnly) in am_hal_uart_int_status_get() argument
214 return AM_REGn(UART, ui32Module, MIS); in am_hal_uart_int_status_get()
221 return AM_REGn(UART, ui32Module, IES); in am_hal_uart_int_status_get()
252 am_hal_uart_int_clear(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_uart_int_clear() argument
257 AM_REGn(UART, ui32Module, IEC) = ui32Interrupt; in am_hal_uart_int_clear()
287 am_hal_uart_int_disable(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_uart_int_disable() argument
292 AM_REGn(UART, ui32Module, IER) &= ~ui32Interrupt; in am_hal_uart_int_disable()
322 am_hal_uart_int_enable(uint32_t ui32Module, uint32_t ui32Interrupt) in am_hal_uart_int_enable() argument
327 AM_REGn(UART, ui32Module, IER) |= ui32Interrupt; in am_hal_uart_int_enable()
355 am_hal_uart_int_enable_get(uint32_t ui32Module) in am_hal_uart_int_enable_get() argument
360 return AM_REGn(UART, ui32Module, IER); in am_hal_uart_int_enable_get()
373 am_hal_uart_enable(uint32_t ui32Module) in am_hal_uart_enable() argument
378 AM_REGan_SET(UART, ui32Module, CR, (AM_REG_UART_CR_UARTEN_M | in am_hal_uart_enable()
393 am_hal_uart_disable(uint32_t ui32Module) in am_hal_uart_disable() argument
398 AM_REGan_CLR(UART, ui32Module, CR, (AM_REG_UART_CR_UARTEN_M | in am_hal_uart_disable()
413 am_hal_uart_pwrctrl_enable(uint32_t ui32Module) in am_hal_uart_pwrctrl_enable() argument
418 am_hal_debug_assert_msg(ui32Module < AM_REG_UART_NUM_MODULES, in am_hal_uart_pwrctrl_enable()
421 am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_UART0 << ui32Module); in am_hal_uart_pwrctrl_enable()
434 am_hal_uart_pwrctrl_disable(uint32_t ui32Module) in am_hal_uart_pwrctrl_disable() argument
439 am_hal_debug_assert_msg(ui32Module < AM_REG_UART_NUM_MODULES, in am_hal_uart_pwrctrl_disable()
442 am_hal_pwrctrl_periph_disable(AM_HAL_PWRCTRL_UART0 << ui32Module); in am_hal_uart_pwrctrl_disable()
455 am_hal_uart_power_on_restore(uint32_t ui32Module) in am_hal_uart_power_on_restore() argument
460 am_hal_debug_assert_msg(ui32Module < AM_REG_UART_NUM_MODULES, in am_hal_uart_power_on_restore()
466 if ( am_hal_uart_pwrsave[ui32Module].bValid == 0 ) in am_hal_uart_power_on_restore()
474 am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_UART0 << ui32Module); in am_hal_uart_power_on_restore()
479 am_hal_clkgen_uarten_set(ui32Module, am_hal_uart_pwrsave[ui32Module].UARTEN); in am_hal_uart_power_on_restore()
484 AM_REGn(UART, ui32Module, ILPR) = am_hal_uart_pwrsave[ui32Module].ILPR; in am_hal_uart_power_on_restore()
485 AM_REGn(UART, ui32Module, IBRD) = am_hal_uart_pwrsave[ui32Module].IBRD; in am_hal_uart_power_on_restore()
486 AM_REGn(UART, ui32Module, FBRD) = am_hal_uart_pwrsave[ui32Module].FBRD; in am_hal_uart_power_on_restore()
487 AM_REGn(UART, ui32Module, LCRH) = am_hal_uart_pwrsave[ui32Module].LCRH; in am_hal_uart_power_on_restore()
488 AM_REGn(UART, ui32Module, CR) = am_hal_uart_pwrsave[ui32Module].CR; in am_hal_uart_power_on_restore()
489 AM_REGn(UART, ui32Module, IFLS) = am_hal_uart_pwrsave[ui32Module].IFLS; in am_hal_uart_power_on_restore()
490 AM_REGn(UART, ui32Module, IER) = am_hal_uart_pwrsave[ui32Module].IER; in am_hal_uart_power_on_restore()
495 am_hal_uart_pwrsave[ui32Module].bValid = 0; in am_hal_uart_power_on_restore()
510 am_hal_uart_power_off_save(uint32_t ui32Module) in am_hal_uart_power_off_save() argument
515 am_hal_debug_assert_msg(ui32Module < AM_REG_UART_NUM_MODULES, in am_hal_uart_power_off_save()
522 am_hal_uart_pwrsave[ui32Module].ILPR = AM_REGn(UART, ui32Module, ILPR); in am_hal_uart_power_off_save()
523 am_hal_uart_pwrsave[ui32Module].IBRD = AM_REGn(UART, ui32Module, IBRD); in am_hal_uart_power_off_save()
524 am_hal_uart_pwrsave[ui32Module].FBRD = AM_REGn(UART, ui32Module, FBRD); in am_hal_uart_power_off_save()
525 am_hal_uart_pwrsave[ui32Module].LCRH = AM_REGn(UART, ui32Module, LCRH); in am_hal_uart_power_off_save()
526 am_hal_uart_pwrsave[ui32Module].CR = AM_REGn(UART, ui32Module, CR); in am_hal_uart_power_off_save()
527 am_hal_uart_pwrsave[ui32Module].IFLS = AM_REGn(UART, ui32Module, IFLS); in am_hal_uart_power_off_save()
528 am_hal_uart_pwrsave[ui32Module].IER = AM_REGn(UART, ui32Module, IER); in am_hal_uart_power_off_save()
534 am_hal_uart_pwrsave[ui32Module].UARTEN = in am_hal_uart_power_off_save()
535 (AM_REG(CLKGEN, UARTEN) & AM_HAL_CLKGEN_UARTEN_UARTENn_M(ui32Module)) >> in am_hal_uart_power_off_save()
536 AM_HAL_CLKGEN_UARTEN_UARTENn_S(ui32Module); in am_hal_uart_power_off_save()
541 am_hal_clkgen_uarten_set(ui32Module, AM_HAL_CLKGEN_UARTEN_DIS); in am_hal_uart_power_off_save()
546 am_hal_uart_pwrsave[ui32Module].bValid = 1; in am_hal_uart_power_off_save()
551 am_hal_pwrctrl_periph_disable(AM_HAL_PWRCTRL_UART0 << ui32Module); in am_hal_uart_power_off_save()
566 am_hal_uart_clock_enable(uint32_t ui32Module) in am_hal_uart_clock_enable() argument
572 am_hal_clkgen_uarten_set(ui32Module, AM_HAL_CLKGEN_UARTEN_EN); in am_hal_uart_clock_enable()
577 AM_REGn(UART, ui32Module, CR) |= AM_REG_UART_CR_CLKEN_M; in am_hal_uart_clock_enable()
582 AM_REGn(UART, ui32Module, CR) |= AM_REG_UART_CR_CLKSEL_24MHZ; in am_hal_uart_clock_enable()
595 am_hal_uart_clock_disable(uint32_t ui32Module) in am_hal_uart_clock_disable() argument
600 AM_REGn(UART, ui32Module, CR) &= ~AM_REG_UART_CR_CLKEN_M; in am_hal_uart_clock_disable()
605 am_hal_clkgen_uarten_set(ui32Module, AM_HAL_CLKGEN_UARTEN_DIS); in am_hal_uart_clock_disable()
635 am_hal_uart_fifo_config(uint32_t ui32Module, uint32_t ui32LvlCfg) in am_hal_uart_fifo_config() argument
640 AM_REGn(UART, ui32Module, LCRH) |= AM_REG_UART_LCRH_FEN_M; in am_hal_uart_fifo_config()
645 AM_REGn(UART, ui32Module, IFLS) = ui32LvlCfg; in am_hal_uart_fifo_config()
658 am_hal_uart_flags_get(uint32_t ui32Module) in am_hal_uart_flags_get() argument
663 return AM_REGn(UART, ui32Module, FR); in am_hal_uart_flags_get()
678 am_hal_uart_char_transmit_polled(uint32_t ui32Module, char cChar) in am_hal_uart_char_transmit_polled() argument
683 while (AM_BFRn(UART, ui32Module, FR, TXFF)); in am_hal_uart_char_transmit_polled()
688 AM_REGn(UART, ui32Module, DR) = cChar; in am_hal_uart_char_transmit_polled()
703 am_hal_uart_string_transmit_polled(uint32_t ui32Module, char *pcString) in am_hal_uart_string_transmit_polled() argument
710 while (AM_BFRn(UART, ui32Module, FR, TXFF)); in am_hal_uart_string_transmit_polled()
715 AM_REGn(UART, ui32Module, DR) = *pcString++; in am_hal_uart_string_transmit_polled()
731 am_hal_uart_char_receive_polled(uint32_t ui32Module, char *pcChar) in am_hal_uart_char_receive_polled() argument
736 while (AM_BFRn(UART, ui32Module, FR, RXFE)); in am_hal_uart_char_receive_polled()
741 *pcChar = AM_REGn(UART, ui32Module, DR); in am_hal_uart_char_receive_polled()
758 am_hal_uart_line_receive_polled(uint32_t ui32Module, in am_hal_uart_line_receive_polled() argument
773 am_hal_uart_char_receive_polled(ui32Module, &cRecChar); in am_hal_uart_line_receive_polled()
804 am_hal_uart_init_buffered(uint32_t ui32Module, in am_hal_uart_init_buffered() argument
811 AM_REGn(UART, ui32Module, IER) |= (AM_REG_UART_IES_RTRIS_M | in am_hal_uart_init_buffered()
817 am_hal_queue_init(&g_psTxQueue[ui32Module], pui8TxArray, 1, ui32TxSize); in am_hal_uart_init_buffered()
818 am_hal_queue_init(&g_psRxQueue[ui32Module], pui8RxArray, 1, ui32RxSize); in am_hal_uart_init_buffered()
834 am_hal_uart_get_status_buffered(uint32_t ui32Module, in am_hal_uart_get_status_buffered() argument
843 *pui32RxSize = am_hal_queue_data_left(&g_psRxQueue[ui32Module]); in am_hal_uart_get_status_buffered()
848 *pui32TxSize = am_hal_queue_data_left(&g_psTxQueue[ui32Module]); in am_hal_uart_get_status_buffered()
866 am_hal_uart_service_buffered(uint32_t ui32Module, uint32_t ui32Status) in am_hal_uart_service_buffered() argument
880 while (!AM_BFRn(UART, ui32Module, FR, RXFE)) in am_hal_uart_service_buffered()
886 ui32FifoEntry = AM_REGn(UART, ui32Module , DR); in am_hal_uart_service_buffered()
895 am_hal_queue_item_add(&g_psRxQueue[ui32Module], &ui8Character, 1); in am_hal_uart_service_buffered()
910 while (am_hal_queue_data_left(&g_psTxQueue[ui32Module]) && in am_hal_uart_service_buffered()
911 !AM_BFRn(UART, ui32Module, FR, TXFF)) in am_hal_uart_service_buffered()
913 am_hal_queue_item_get(&g_psTxQueue[ui32Module], &ui8Character, 1); in am_hal_uart_service_buffered()
914 AM_REGn(UART, ui32Module , DR) = ui8Character; in am_hal_uart_service_buffered()
940 am_hal_uart_service_buffered_timeout_save(uint32_t ui32Module, uint32_t ui32Status) in am_hal_uart_service_buffered_timeout_save() argument
956 uint32_t ui32FifoCfg = AM_BFMn(UART, ui32Module, IFLS, RXIFLSEL); in am_hal_uart_service_buffered_timeout_save()
976 while (!AM_BFRn(UART, ui32Module, FR, RXFE)) in am_hal_uart_service_buffered_timeout_save()
982 ui32FifoEntry = AM_REGn(UART, ui32Module, DR); in am_hal_uart_service_buffered_timeout_save()
991 am_hal_queue_item_add(&g_psRxQueue[ui32Module], &ui8Character, 1); in am_hal_uart_service_buffered_timeout_save()
1014 while (am_hal_queue_data_left(&g_psTxQueue[ui32Module]) && in am_hal_uart_service_buffered_timeout_save()
1015 !AM_BFRn(UART, ui32Module, FR, TXFF)) in am_hal_uart_service_buffered_timeout_save()
1017 am_hal_queue_item_get(&g_psTxQueue[ui32Module], &ui8Character, 1); in am_hal_uart_service_buffered_timeout_save()
1018 AM_REGn(UART, ui32Module , DR) = ui8Character; in am_hal_uart_service_buffered_timeout_save()
1035 am_hal_uart_char_transmit_buffered(uint32_t ui32Module, char cChar) in am_hal_uart_char_transmit_buffered() argument
1040 if (am_hal_queue_empty(&g_psTxQueue[ui32Module]) && in am_hal_uart_char_transmit_buffered()
1041 !AM_BFRn(UART, ui32Module, FR, TXFF)) in am_hal_uart_char_transmit_buffered()
1047 AM_REGn(UART, ui32Module, DR) = cChar; in am_hal_uart_char_transmit_buffered()
1058 am_hal_queue_item_add(&g_psTxQueue[ui32Module], &cChar, 1); in am_hal_uart_char_transmit_buffered()
1075 am_hal_uart_string_transmit_buffered(uint32_t ui32Module, char *pcString) in am_hal_uart_string_transmit_buffered() argument
1082 if (am_hal_queue_empty(&g_psTxQueue[ui32Module]) && in am_hal_uart_string_transmit_buffered()
1083 !AM_BFRn(UART, ui32Module, FR, TXFF)) in am_hal_uart_string_transmit_buffered()
1089 AM_REGn(UART, ui32Module, DR) = *pcString; in am_hal_uart_string_transmit_buffered()
1100 am_hal_queue_item_add(&g_psTxQueue[ui32Module], pcString, 1); in am_hal_uart_string_transmit_buffered()
1123 am_hal_uart_char_receive_buffered(uint32_t ui32Module, in am_hal_uart_char_receive_buffered() argument
1132 while (am_hal_queue_data_left(&g_psRxQueue[ui32Module]) && ui32MaxChars) in am_hal_uart_char_receive_buffered()
1137 am_hal_queue_item_get(&g_psRxQueue[ui32Module], pcString, 1); in am_hal_uart_char_receive_buffered()