Lines Matching refs:pm
139 static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode) in pm_set_osc0_mode() argument
142 u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; in pm_set_osc0_mode()
146 pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; in pm_set_osc0_mode()
150 void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) in pm_enable_osc0_ext_clock() argument
152 pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); in pm_enable_osc0_ext_clock()
156 void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) in pm_enable_osc0_crystal() argument
158 pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : in pm_enable_osc0_crystal()
165 void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) in pm_enable_clk0() argument
167 pm_enable_clk0_no_wait(pm, startup); in pm_enable_clk0()
168 pm_wait_for_clk0_ready(pm); in pm_enable_clk0()
172 void pm_disable_clk0(volatile avr32_pm_t *pm) in pm_disable_clk0() argument
174 pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK; in pm_disable_clk0()
178 void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) in pm_enable_clk0_no_wait() argument
181 u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; in pm_enable_clk0_no_wait()
185 pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; in pm_enable_clk0_no_wait()
187 pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; in pm_enable_clk0_no_wait()
191 void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) in pm_wait_for_clk0_ready() argument
193 while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK)); in pm_wait_for_clk0_ready()
202 static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode) in pm_set_osc1_mode() argument
205 u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; in pm_set_osc1_mode()
209 pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; in pm_set_osc1_mode()
213 void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) in pm_enable_osc1_ext_clock() argument
215 pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); in pm_enable_osc1_ext_clock()
219 void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) in pm_enable_osc1_crystal() argument
221 pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : in pm_enable_osc1_crystal()
228 void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) in pm_enable_clk1() argument
230 pm_enable_clk1_no_wait(pm, startup); in pm_enable_clk1()
231 pm_wait_for_clk1_ready(pm); in pm_enable_clk1()
235 void pm_disable_clk1(volatile avr32_pm_t *pm) in pm_disable_clk1() argument
237 pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK; in pm_disable_clk1()
241 void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) in pm_enable_clk1_no_wait() argument
244 u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; in pm_enable_clk1_no_wait()
248 pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; in pm_enable_clk1_no_wait()
250 pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; in pm_enable_clk1_no_wait()
254 void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) in pm_wait_for_clk1_ready() argument
256 while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK)); in pm_wait_for_clk1_ready()
265 static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode) in pm_set_osc32_mode() argument
268 u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; in pm_set_osc32_mode()
272 pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; in pm_set_osc32_mode()
276 void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) in pm_enable_osc32_ext_clock() argument
278 pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); in pm_enable_osc32_ext_clock()
282 void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) in pm_enable_osc32_crystal() argument
284 pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); in pm_enable_osc32_crystal()
288 void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) in pm_enable_clk32() argument
290 pm_enable_clk32_no_wait(pm, startup); in pm_enable_clk32()
291 pm_wait_for_clk32_ready(pm); in pm_enable_clk32()
295 void pm_disable_clk32(volatile avr32_pm_t *pm) in pm_disable_clk32() argument
297 pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK; in pm_disable_clk32()
301 void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) in pm_enable_clk32_no_wait() argument
304 u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; in pm_enable_clk32_no_wait()
309 pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; in pm_enable_clk32_no_wait()
313 void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) in pm_wait_for_clk32_ready() argument
315 while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK)); in pm_wait_for_clk32_ready()
319 void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long *p_cksel) in pm_cksel_get() argument
321 *p_cksel = pm->cksel; in pm_cksel_get()
325 void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel) in pm_cksel_set() argument
327 pm->cksel = cksel; in pm_cksel_set()
330 while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); in pm_cksel_set()
334 void pm_cksel(volatile avr32_pm_t *pm, in pm_cksel() argument
353 pm->cksel = u_avr32_pm_cksel.cksel; in pm_cksel()
356 while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); in pm_cksel()
360 void pm_gc_setup(volatile avr32_pm_t *pm, in pm_gc_setup() argument
374 pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; in pm_gc_setup()
378 void pm_gc_enable(volatile avr32_pm_t *pm, in pm_gc_enable() argument
381 pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK; in pm_gc_enable()
385 void pm_gc_disable(volatile avr32_pm_t *pm, in pm_gc_disable() argument
388 pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK; in pm_gc_disable()
392 void pm_pll_setup(volatile avr32_pm_t *pm, in pm_pll_setup() argument
406 pm->pll[pll] = u_avr32_pm_pll.pll; in pm_pll_setup()
410 void pm_pll_set_option(volatile avr32_pm_t *pm, in pm_pll_set_option() argument
416 u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; in pm_pll_set_option()
418 pm->pll[pll] = u_avr32_pm_pll.pll; in pm_pll_set_option()
422 unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, in pm_pll_get_option() argument
425 return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET; in pm_pll_get_option()
429 void pm_pll_enable(volatile avr32_pm_t *pm, in pm_pll_enable() argument
432 pm->pll[pll] |= AVR32_PM_PLLEN_MASK; in pm_pll_enable()
436 void pm_pll_disable(volatile avr32_pm_t *pm, in pm_pll_disable() argument
439 pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK; in pm_pll_disable()
443 void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) in pm_wait_for_pll0_locked() argument
445 while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK)); in pm_wait_for_pll0_locked()
449 void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) in pm_wait_for_pll1_locked() argument
451 while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK)); in pm_wait_for_pll1_locked()
455 unsigned long pm_get_clock(volatile avr32_pm_t *pm) in pm_get_clock() argument
457 u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; in pm_get_clock()
462 void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) in pm_switch_to_clock() argument
465 u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; in pm_switch_to_clock()
469 pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; in pm_switch_to_clock()
473 void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) in pm_switch_to_osc0() argument
475 pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode in pm_switch_to_osc0()
476 …pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical… in pm_switch_to_osc0()
477 pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 in pm_switch_to_osc0()
481 void pm_bod_enable_irq(volatile avr32_pm_t *pm) in pm_bod_enable_irq() argument
483 pm->ier = AVR32_PM_IER_BODDET_MASK; in pm_bod_enable_irq()
487 void pm_bod_disable_irq(volatile avr32_pm_t *pm) in pm_bod_disable_irq() argument
492 pm->idr = AVR32_PM_IDR_BODDET_MASK; in pm_bod_disable_irq()
493 pm->isr; in pm_bod_disable_irq()
498 void pm_bod_clear_irq(volatile avr32_pm_t *pm) in pm_bod_clear_irq() argument
500 pm->icr = AVR32_PM_ICR_BODDET_MASK; in pm_bod_clear_irq()
504 unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm) in pm_bod_get_irq_status() argument
506 return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0); in pm_bod_get_irq_status()
510 unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm) in pm_bod_get_irq_enable_bit() argument
512 return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0); in pm_bod_get_irq_enable_bit()
516 unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) in pm_bod_get_level() argument
518 return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET; in pm_bod_get_level()
522 unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp) in pm_read_gplp() argument
524 return pm->gplp[gplp]; in pm_read_gplp()
528 void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) in pm_write_gplp() argument
530 pm->gplp[gplp] = value; in pm_write_gplp()
534 long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module) in pm_enable_module() argument
537 unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); in pm_enable_module()
547 long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module) in pm_disable_module() argument
550 unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); in pm_disable_module()